[ARM/FDPIC v6 00/24] FDPIC ABI for ARM
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[ARM/FDPIC v6 00/24] FDPIC ABI for ARM
 
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Hello,
Since all patches of v5 have now been approved, I'm posting v6 to share the actual patches I'm about to commit (some had minor changes compared to v5). Thanks to the reviewers, Christophe Changes between v5 and v6: - rebased on top of recent gcc-10 master (September 9th, 2019) - fixed libitm support - addressed feedback received about v5 - there are 3 more patches (skip tests that use -static, libitm fixes, split of libstdc++ configury) Changes between v4 and v5: - rebased on top of recent gcc-10 master (April 26th, 2019) - fixed handling of stack-protector combined patterns in FDPIC mode Changes between v3 and v4: - improved documentation (patch 1) - emit an error message (sorry) if the target architecture does not support arm nor thumb-2 modes (patch 4) - handle Richard's comments on patch 4 (comments, unspec) - added .align directive (patch 5) - fixed use of kernel helpers (__kernel_cmpxchg, __kernel_dmb) (patch 6) - code factorization in patch 7 - typos/internal function name in patch 8 - improved patch 12 - dropped patch 16 - patch 20 introduces arm_arch*_thumb_ok effective targets to help skip some tests - I tested patch 2 on xtensa-buildroot-uclinux-uclibc, it adds many new tests, but a few regressions (https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00713.html) - I compiled and executed several LTP tests to exercise pthreads and signals - I wrote and executed a simple testcase to change the interaction with __kernel_cmpxchg (ie. call the kernel helper rather than use an implementation in libgcc as requested by Richard) Changes between v2 and v3: - added doc entry for -mfdpic new option - took Kyrill's comments into account (use "Armv7" instead of "7", code factorization, use preprocessor instead of hard-coding "r9", remove leftover code for thumb1 support, fixed comments) - rebase over recent trunk - patches with changes: 1, 2 (commit message), 3 (rebase), 4, 6, 7, 9, 14 (rebase), 19 (rebase) Changes between v1 and v2: - fix GNU coding style - exit with an error for pre-Armv7 - use ACLE __ARM_ARCH and remove dead code for pre-Armv4 - remove unsupported attempts of pre-Armv7/thumb1 support - add instructions in comments next to opcodes - merge patches 11 and 13 - fixed protected visibility handling in patch 8 - merged legitimize_tls_address_fdpic and legitimize_tls_address_not_fdpic as requested This patch series implements the GCC contribution of the FDPIC ABI for ARM targets. This ABI enables to run Linux on ARM MMU-less cores and supports shared libraries to reduce the memory footprint. Without MMU, text and data segments relative distances are different from one process to another, hence the need for a dedicated FDPIC register holding the start address of the data segment. One of the side effects is that function pointers require two words to be represented: the address of the code, and the data segment start address. These two words are designated as "Function Descriptor", hence the "FD PIC" name. On ARM, the FDPIC register is r9 [1], and the target name is arm-uclinuxfdpiceabi. Note that arm-uclinux exists, but uses another ABI and the BFLAT file format; it does not support code sharing. The -mfdpic option is enabled by default, and -mno-fdpic should be used to build the Linux kernel. This work was developed some time ago by STMicroelectronics, and was presented during Linaro Connect SFO15 (September 2015). You can watch the discussion and read the slides [2]. This presentation was related to the toolchain published on github [3], which is based on binutils-2.22, gcc-4.7, uclibc-0.9.33.2, gdb-7.5.1 and qemu-2.3.0, and for which pre-built binaries are available [3]. The ABI itself is described in details in [1]. Our Linux kernel patches have been updated and committed by Nicolas Pitre (Linaro) in July 2017. They are required so that the loader is able to handle this new file type. Indeed, the ELF files are tagged with ELFOSABI_ARM_FDPIC. This new tag has been allocated by ARM, as well as the new relocations involved. The binutils, QEMU and uclibc-ng patch series have been merged a few months ago. [4][5][6] This series provides support for architectures that support ARM and/or Thumb-2 and has been tested on arm-linux-gnueabi without regression, as well as arm-uclinuxfdpiceabi, using QEMU. arm-uclinuxfdpiceabi has a few more failures than arm-linux-gnueabi, but is quite functional. I have also booted an STM32 board (stm32f469) which uses a cortex-m4 with linux-4.20.17 and ran successfully several tools. Thanks, Christophe. [1] https://github.com/mickael-guene/fdpic_doc/blob/master/abi.txt [2] http://connect.linaro.org/resource/sfo15/sfo15-406-arm-fdpic-toolset-kernel-libraries-for-cortex-m-cortex-r-mmuless-cores/ [3] https://github.com/mickael-guene/fdpic_manifest [4] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=f1ac0afe481e83c9a33f247b81fa7de789edc4d9 [5] https://git.qemu.org/?p=qemu.git;a=commit;h=e8fa72957419c11984608062c7dcb204a6003a06 [6] https://cgit.uclibc-ng.org/cgi/cgit/uclibc-ng.git/commit/?id=13c46fbc1e5a021f2b9ed32d83aecc93ae5e655d Christophe Lyon (24): [ARM] FDPIC: Add -mfdpic option support [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided [ARM] FDPIC: Add support for FDPIC for arm architecture [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation [ARM] FDPIC: Add support for c++ exceptions [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only [ARM] FDPIC: Enforce local/global binding for function descriptors [ARM] FDPIC: Add support for taking address of nested function [ARM] FDPIC: Implement TLS support. [ARM] FDPIC: Add support to unwind FDPIC signal frame [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture [ARM][testsuite] FDPIC: Skip unsupported tests [ARM][testsuite] FDPIC: Adjust scan-assembler patterns. [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode [ARM][testsuite] FDPIC: Handle *-*-uclinux* [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc. [ARM][testsuite] FDPIC: Skip tests using architectures unsupported by FDPIC [ARM] FDPIC: Handle stack-protector combined patterns [ARM][testsuite] FDPIC: Skip tests that require -static support [ARM] FDPIC: Implement libitm support. [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in libstdc++ configure scripts config/futex.m4 | 2 +- config/tls.m4 | 2 +- gcc/config.gcc | 11 +- gcc/config/arm/arm-c.c | 2 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm.c | 484 ++++++++++++++++++--- gcc/config/arm/arm.h | 16 +- gcc/config/arm/arm.md | 83 +++- gcc/config/arm/arm.opt | 4 + gcc/config/arm/bpabi.h | 5 +- gcc/config/arm/linux-eabi.h | 7 +- gcc/config/arm/uclinuxfdpiceabi.h | 54 +++ gcc/config/arm/unspecs.md | 1 + gcc/doc/invoke.texi | 24 +- gcc/ginclude/unwind-arm-common.h | 2 +- gcc/testsuite/g++.dg/abi/forced.C | 2 +- gcc/testsuite/g++.dg/abi/guard2.C | 2 +- gcc/testsuite/g++.dg/cpp0x/noexcept03.C | 2 +- gcc/testsuite/g++.dg/ext/cleanup-10.C | 2 +- gcc/testsuite/g++.dg/ext/cleanup-11.C | 2 +- gcc/testsuite/g++.dg/ext/cleanup-8.C | 2 +- gcc/testsuite/g++.dg/ext/cleanup-9.C | 2 +- gcc/testsuite/g++.dg/ext/sync-4.C | 2 +- gcc/testsuite/g++.dg/ipa/comdat.C | 2 +- gcc/testsuite/g++.dg/ipa/devirt-c-7.C | 3 +- gcc/testsuite/g++.dg/ipa/ivinline-1.C | 2 +- gcc/testsuite/g++.dg/ipa/ivinline-2.C | 2 +- gcc/testsuite/g++.dg/ipa/ivinline-3.C | 2 +- gcc/testsuite/g++.dg/ipa/ivinline-4.C | 2 +- gcc/testsuite/g++.dg/ipa/ivinline-5.C | 2 +- gcc/testsuite/g++.dg/ipa/ivinline-7.C | 2 +- gcc/testsuite/g++.dg/ipa/ivinline-8.C | 2 +- gcc/testsuite/g++.dg/ipa/ivinline-9.C | 2 +- gcc/testsuite/g++.dg/other/anon5.C | 1 + gcc/testsuite/g++.dg/tls/pr79288.C | 2 +- gcc/testsuite/gcc.c-torture/compile/pr82096.c | 2 +- gcc/testsuite/gcc.dg/20020312-2.c | 1 + gcc/testsuite/gcc.dg/20041106-1.c | 2 +- gcc/testsuite/gcc.dg/addr_equal-1.c | 3 +- gcc/testsuite/gcc.dg/cleanup-10.c | 2 +- gcc/testsuite/gcc.dg/cleanup-11.c | 2 +- gcc/testsuite/gcc.dg/cleanup-8.c | 2 +- gcc/testsuite/gcc.dg/cleanup-9.c | 2 +- gcc/testsuite/gcc.dg/const-1.c | 2 +- gcc/testsuite/gcc.dg/fdata-sections-1.c | 2 +- gcc/testsuite/gcc.dg/fdata-sections-2.c | 2 +- gcc/testsuite/gcc.dg/ipa/pure-const-1.c | 2 +- gcc/testsuite/gcc.dg/noreturn-8.c | 2 +- gcc/testsuite/gcc.dg/pr33826.c | 3 +- gcc/testsuite/gcc.dg/pr39323-1.c | 2 +- gcc/testsuite/gcc.dg/pr39323-2.c | 2 +- gcc/testsuite/gcc.dg/pr39323-3.c | 2 +- gcc/testsuite/gcc.dg/pr65780-1.c | 2 +- gcc/testsuite/gcc.dg/pr65780-2.c | 2 +- gcc/testsuite/gcc.dg/pr67338.c | 2 +- gcc/testsuite/gcc.dg/pr78185.c | 2 +- gcc/testsuite/gcc.dg/pr83100-1.c | 2 +- gcc/testsuite/gcc.dg/pr83100-4.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-12g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-14g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-14gf.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-16g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-17g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-18g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-1f.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-22g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-2f.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-31g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-33g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-4g.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-4gf.c | 2 +- gcc/testsuite/gcc.dg/strncmp-2.c | 2 +- gcc/testsuite/gcc.dg/struct-ret-3.c | 2 +- gcc/testsuite/gcc.dg/torture/ipa-pta-1.c | 2 +- gcc/testsuite/gcc.dg/torture/pr69760.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/alias-2.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c | 2 +- gcc/testsuite/gcc.target/arm/20051215-1.c | 1 + .../gcc.target/arm/armv6-unaligned-load-ice.c | 1 + .../gcc.target/arm/attr-unaligned-load-ice.c | 1 + gcc/testsuite/gcc.target/arm/attr_arm-err.c | 2 +- gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 + gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 + .../gcc.target/arm/di-longlong64-sync-withldrexd.c | 3 +- gcc/testsuite/gcc.target/arm/div64-unwinding.c | 2 +- gcc/testsuite/gcc.target/arm/eliminate.c | 2 +- gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c | 2 +- gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c | 2 +- gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c | 1 + gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c | 1 + gcc/testsuite/gcc.target/arm/g2.c | 1 + gcc/testsuite/gcc.target/arm/interrupt-1.c | 6 +- gcc/testsuite/gcc.target/arm/interrupt-2.c | 6 +- gcc/testsuite/gcc.target/arm/ivopts-2.c | 2 +- gcc/testsuite/gcc.target/arm/ivopts-3.c | 2 +- gcc/testsuite/gcc.target/arm/ivopts-4.c | 2 +- gcc/testsuite/gcc.target/arm/ivopts-5.c | 2 +- gcc/testsuite/gcc.target/arm/macro_defs1.c | 1 + gcc/testsuite/gcc.target/arm/mmx-1.c | 1 + gcc/testsuite/gcc.target/arm/pr19599.c | 1 + gcc/testsuite/gcc.target/arm/pr40887.c | 1 + gcc/testsuite/gcc.target/arm/pr43597.c | 2 +- gcc/testsuite/gcc.target/arm/pr43698.c | 4 +- gcc/testsuite/gcc.target/arm/pr43920-2.c | 2 +- gcc/testsuite/gcc.target/arm/pr45701-1.c | 4 +- gcc/testsuite/gcc.target/arm/pr45701-2.c | 4 +- gcc/testsuite/gcc.target/arm/pr59858.c | 1 + gcc/testsuite/gcc.target/arm/pr61948.c | 1 + gcc/testsuite/gcc.target/arm/pr65647-2.c | 1 + gcc/testsuite/gcc.target/arm/pr66912.c | 2 +- gcc/testsuite/gcc.target/arm/pr70830.c | 3 +- gcc/testsuite/gcc.target/arm/pr77933-1.c | 1 + gcc/testsuite/gcc.target/arm/pr77933-2.c | 1 + gcc/testsuite/gcc.target/arm/pr79058.c | 1 + gcc/testsuite/gcc.target/arm/pr83712.c | 1 + .../gcc.target/arm/pragma_arch_switch_2.c | 1 + gcc/testsuite/gcc.target/arm/scd42-1.c | 1 + gcc/testsuite/gcc.target/arm/scd42-2.c | 1 + gcc/testsuite/gcc.target/arm/scd42-3.c | 1 + gcc/testsuite/gcc.target/arm/sibcall-1.c | 1 + gcc/testsuite/gcc.target/arm/stack-checking.c | 2 +- gcc/testsuite/gcc.target/arm/stack-red-zone.c | 2 +- gcc/testsuite/gcc.target/arm/synchronize.c | 2 +- gcc/testsuite/gcc.target/arm/tail-long-call.c | 1 + gcc/testsuite/gcc.target/arm/tlscall.c | 1 + gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c | 1 + gcc/testsuite/lib/target-supports.exp | 35 +- libatomic/configure | 11 +- libatomic/configure.tgt | 2 +- libgcc/config.host | 4 +- libgcc/config/arm/linux-atomic.c | 55 ++- libgcc/config/arm/unwind-arm.c | 5 + libgcc/config/arm/unwind-arm.h | 31 +- libgcc/crtstuff.c | 16 + libgcc/unwind-arm-common.inc | 216 +++++++++ libgcc/unwind-pe.h | 17 + libitm/config/arm/sjlj.S | 11 +- libitm/configure | 22 +- libitm/configure.tgt | 2 +- libsanitizer/configure.tgt | 3 + libstdc++-v3/acinclude.m4 | 9 +- libstdc++-v3/configure | 35 +- libstdc++-v3/configure.host | 6 +- libstdc++-v3/libsupc++/eh_personality.cc | 10 +- libtool.m4 | 11 +- 160 files changed, 1200 insertions(+), 227 deletions(-) create mode 100644 gcc/config/arm/uclinuxfdpiceabi.h mode change 100644 => 100755 libitm/configure -- 2.6.3 |
[ARM/FDPIC v6 01/24] [ARM] FDPIC: Add -mfdpic option support
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From: Christophe Lyon <[hidden email]>
2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config/arm/arm.opt: Add -mfdpic option. * doc/invoke.texi: Add documentation for -mfdpic. Change-Id: I05b98d6ae87c2b3fc04dd7fba415c730accdf33e diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 5ecc5e5..545ec49 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -306,3 +306,7 @@ Cost to assume for a branch insn. mgeneral-regs-only Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save Generate code which uses the core registers only (r0-r14). + +mfdpic +Target Report Mask(FDPIC) +Enable Function Descriptor PIC mode. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index bfcd76e..cc283ff 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -711,7 +711,8 @@ Objective-C and Objective-C++ Dialects}. -mrestrict-it @gol -mverbose-cost-dump @gol -mpure-code @gol --mcmse} +-mcmse @gol +-mfdpic} @emph{AVR Options} @gccoptlist{-mmcu=@var{mcu} -mabsdata -maccumulate-args @gol @@ -18043,6 +18044,27 @@ MOVT instruction. Generate secure code as per the "ARMv8-M Security Extensions: Requirements on Development Tools Engineering Specification", which can be found on @url{http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/ECM0359818_armv8m_security_extensions_reqs_on_dev_tools_1_0.pdf}. + +@item -mfdpic +@itemx -mno-fdpic +@opindex mfdpic +@opindex mno-fdpic +Select the FDPIC ABI, which uses 64-bit function descriptors to +represent pointers to functions. When the compiler is configured for +@code{arm-*-uclinuxfdpiceabi} targets, this option is on by default +and implies @option{-fPIE} if none of the PIC/PIE-related options is +provided. On other targets, it only enables the FDPIC-specific code +generation features, and the user should explicitly provide the +PIC/PIE-related options as needed. + +Note that static linking is not supported because it would still +involve the dynamic linker when the program self-relocates. If such +behavior is acceptable, use -static and -Wl,-dynamic-linker options. + +The opposite @option{-mno-fdpic} option is useful (and required) to +build the Linux kernel using the same (@code{arm-*-uclinuxfdpiceabi}) +toolchain as the one used to build the userland programs. + @end table @node AVR Options -- 2.6.3 |
[ARM/FDPIC v6 02/24] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
The new arm-uclinuxfdpiceabi target behaves pretty much like arm-linux-gnueabi. In order to enable the same set of features, we have to update several configure scripts that generally match targets like *-*-linux*: in most places, we add *-uclinux* where there is already *-linux*, or uclinux* when there is already linux*. In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi because there is already a different behaviour for *-*uclinux* target. In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared libraries support is required, as uclinux does not guarantee that. 2019-XX-XX Christophe Lyon <[hidden email]> config/ * futex.m4: Handle *-uclinux*. * tls.m4 (GCC_CHECK_TLS): Likewise. gcc/ * config.gcc: Handle *-*-uclinuxfdpiceabi. libatomic/ * configure.tgt: Handle arm*-*-uclinux*. * configure: Regenerate. libgcc/ * config.host: Handle *-*-uclinuxfdpiceabi. libitm/ * configure.tgt: Handle *-*-uclinux*. * configure: Regenerate. * libtool.m4: Handle uclinuxfdpiceabi. Change-Id: Ib3a08905879ef917ee6c04c3988cf4ced7209fef diff --git a/config/futex.m4 b/config/futex.m4 index 1b43829..c212438 100644 --- a/config/futex.m4 +++ b/config/futex.m4 @@ -9,7 +9,7 @@ AC_DEFUN([GCC_LINUX_FUTEX],[dnl GCC_ENABLE(linux-futex,default, ,[use the Linux futex system call], permit yes|no|default) case "$target" in - *-linux*) + *-linux* | *-uclinux*) case "$enable_linux_futex" in default) # If headers don't have gettid/futex syscalls definition, then diff --git a/config/tls.m4 b/config/tls.m4 index 1a5fc59..7532305 100644 --- a/config/tls.m4 +++ b/config/tls.m4 @@ -76,7 +76,7 @@ AC_DEFUN([GCC_CHECK_TLS], [ dnl Shared library options may depend on the host; this check dnl is only known to be needed for GNU/Linux. case $host in - *-*-linux*) + *-*-linux* | -*-uclinuxfdpic*) LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS" ;; esac diff --git a/gcc/config.gcc b/gcc/config.gcc index 94a3608..69904fd 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -771,7 +771,7 @@ case ${target} in *-*-fuchsia*) native_system_header_dir=/include ;; -*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu) +*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi) extra_options="$extra_options gnu-user.opt" gas=yes gnu_ld=yes @@ -800,7 +800,7 @@ case ${target} in *-*-*android*) tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC" ;; - *-*-*uclibc*) + *-*-*uclibc* | *-*-uclinuxfdpiceabi) tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC" ;; *-*-*musl*) @@ -1198,7 +1198,7 @@ arm*-*-netbsdelf*) armv7*) target_cpu_cname="generic-armv7-a";; esac ;; -arm*-*-linux-*) # ARM GNU/Linux with ELF +arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h" extra_options="${extra_options} linux-android.opt" case $target in diff --git a/libatomic/configure b/libatomic/configure index e6f5fb7..7bd01a1 100755 --- a/libatomic/configure +++ b/libatomic/configure @@ -6055,7 +6055,7 @@ irix5* | irix6* | nonstopux*) ;; # This must be Linux ELF. -linux* | k*bsd*-gnu | kopensolaris*-gnu) +linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) lt_cv_deplibs_check_method=pass_all ;; @@ -9135,7 +9135,7 @@ _LT_EOF archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' ;; - gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu) + gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) tmp_diet=no if test "$host_os" = linux-dietlibc; then case $cc_basename in @@ -10666,7 +10666,12 @@ linux*oldld* | linux*aout* | linux*coff*) ;; # This must be Linux ELF. -linux* | k*bsd*-gnu | kopensolaris*-gnu) + +# uclinux* changes (here and below) have been submitted to the libtool +# project, but have not yet been accepted: they are GCC-local changes +# for the time being. (See +# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html) +linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) version_type=linux need_lib_prefix=no need_version=no diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt index 4a1294b..61778fb 100644 --- a/libatomic/configure.tgt +++ b/libatomic/configure.tgt @@ -124,7 +124,7 @@ case "${target}" in config_path="${config_path} linux/aarch64 posix" ;; - arm*-*-linux*) + arm*-*-linux* | arm*-*-uclinux*) # OS support for atomic primitives. config_path="${config_path} linux/arm posix" ;; diff --git a/libgcc/config.host b/libgcc/config.host index 1db5287..bfe5952 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -245,7 +245,7 @@ case ${host} in tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-fuchsia" extra_parts="crtbegin.o crtend.o" ;; -*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu) +*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu | *-*-uclinuxfdpiceabi) tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-gld t-slibgcc-elf-ver t-linux" extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o" if test x$enable_vtable_verify = xyes; then @@ -450,7 +450,7 @@ arm*-*-netbsdelf*) ;; esac ;; -arm*-*-linux*) # ARM GNU/Linux with ELF +arm*-*-linux* | arm*-*-uclinuxfdpiceabi) tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix t-crtfm" tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc" tm_file="$tm_file arm/bpabi-lib.h" diff --git a/libitm/configure b/libitm/configure old mode 100644 new mode 100755 index c466ae0..5315fab --- a/libitm/configure +++ b/libitm/configure @@ -6731,7 +6731,7 @@ irix5* | irix6* | nonstopux*) ;; # This must be Linux ELF. -linux* | k*bsd*-gnu | kopensolaris*-gnu) +linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) lt_cv_deplibs_check_method=pass_all ;; @@ -9812,7 +9812,7 @@ _LT_EOF archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' ;; - gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu) + gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) tmp_diet=no if test "$host_os" = linux-dietlibc; then case $cc_basename in @@ -11343,7 +11343,12 @@ linux*oldld* | linux*aout* | linux*coff*) ;; # This must be Linux ELF. -linux* | k*bsd*-gnu | kopensolaris*-gnu) + +# uclinux* changes (here and below) have been submitted to the libtool +# project, but have not yet been accepted: they are GCC-local changes +# for the time being. (See +# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html) +linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) version_type=linux need_lib_prefix=no need_version=no @@ -15003,7 +15008,12 @@ linux*oldld* | linux*aout* | linux*coff*) ;; # This must be Linux ELF. -linux* | k*bsd*-gnu | kopensolaris*-gnu) + +# uclinux* changes (here and below) have been submitted to the libtool +# project, but have not yet been accepted: they are GCC-local changes +# for the time being. (See +# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html) +linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) version_type=linux need_lib_prefix=no need_version=no @@ -16468,7 +16478,7 @@ fi case "$target" in - *-linux*) + *-linux* | *-uclinux*) case "$enable_linux_futex" in default) # If headers don't have gettid/futex syscalls definition, then @@ -16593,7 +16603,7 @@ _ACEOF if ac_fn_c_try_link "$LINENO"; then : chktls_save_LDFLAGS="$LDFLAGS" case $host in - *-*-linux*) + *-*-linux* | -*-uclinuxfdpic*) LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS" ;; esac diff --git a/libitm/configure.tgt b/libitm/configure.tgt index 4c0b602..eea865d 100644 --- a/libitm/configure.tgt +++ b/libitm/configure.tgt @@ -127,7 +127,7 @@ config_path="$ARCH posix generic" # Other system configury case "${target}" in - *-*-linux*) + *-*-linux* | *-*-uclinux*) if test "$enable_linux_futex" = yes; then config_path="linux/$ARCH linux $config_path" fi diff --git a/libtool.m4 b/libtool.m4 index 8966762..e194e89 100644 --- a/libtool.m4 +++ b/libtool.m4 @@ -2449,7 +2449,12 @@ linux*oldld* | linux*aout* | linux*coff*) ;; # This must be Linux ELF. -linux* | k*bsd*-gnu | kopensolaris*-gnu) + +# uclinux* changes (here and below) have been submitted to the libtool +# project, but have not yet been accepted: they are GCC-local changes +# for the time being. (See +# https://lists.gnu.org/archive/html/libtool-patches/2018-05/msg00000.html) +linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) version_type=linux need_lib_prefix=no need_version=no @@ -3089,7 +3094,7 @@ irix5* | irix6* | nonstopux*) ;; # This must be Linux ELF. -linux* | k*bsd*-gnu | kopensolaris*-gnu) +linux* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) lt_cv_deplibs_check_method=pass_all ;; @@ -4449,7 +4454,7 @@ _LT_EOF _LT_TAGVAR(archive_expsym_cmds, $1)='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' ;; - gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu) + gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu | uclinuxfdpiceabi) tmp_diet=no if test "$host_os" = linux-dietlibc; then case $cc_basename in -- 2.6.3 |
[ARM/FDPIC v6 03/24] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie, -fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code for executables rather than shared libraries by default. We also make sure to use the --fdpic assembler option, and select the appropriate linker emulation. At link time, we also default to -pie, unless we are generating a shared library or a relocatable file (-r). Note that static link is not supported as it requires specifying the dynamic linker because the executable still has to relocate itself at startup. We also force 'now' binding since lazy binding is not supported. We should also apply the same behavior for -Wl,-Ur as for -r, but I couldn't find how to describe that in the specs fragment. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config.gcc: Handle arm*-*-uclinuxfdpiceabi. * config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New. (SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC. * config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New. (CC1_SPEC): Use FDPIC_CC1_SPEC. (MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed. * config/arm/uclinuxfdpiceabi.h: New file. libsanitizer/ * configure.tgt (arm*-*-*fdpiceabi): Sanitizers are unsupported in this configuration. Change-Id: I74ac1fbb2e809e864d2b0acce66b173e76bcf92b diff --git a/gcc/config.gcc b/gcc/config.gcc index 69904fd..2a6a8f0 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -1208,6 +1208,11 @@ arm*-*-linux-* | arm*-*-uclinuxfdpiceabi) esac tmake_file="${tmake_file} arm/t-arm arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi" tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h arm/aout.h arm/arm.h" + case $target in + arm*-*-uclinuxfdpiceabi) + tm_file="$tm_file arm/uclinuxfdpiceabi.h" + ;; + esac # Generation of floating-point instructions requires at least ARMv5te. if [ "$with_float" = "hard" -o "$with_float" = "softfp" ] ; then target_cpu_cname="arm10e" diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index e1bacf4..75d9a99 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -55,6 +55,8 @@ #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\ "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}" +#define TARGET_FDPIC_ASM_SPEC "" + #define BE8_LINK_SPEC \ "%{!r:%{!mbe32:%:be8_linkopt(%{mlittle-endian:little}" \ " %{mbig-endian:big}" \ @@ -64,7 +66,8 @@ /* Tell the assembler to build BPABI binaries. */ #undef SUBTARGET_EXTRA_ASM_SPEC #define SUBTARGET_EXTRA_ASM_SPEC \ - "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC + "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC \ + TARGET_FDPIC_ASM_SPEC #ifndef SUBTARGET_EXTRA_LINK_SPEC #define SUBTARGET_EXTRA_LINK_SPEC "" diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h index 66ec0ea..b348971 100644 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h @@ -89,7 +89,7 @@ #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}" #endif #define MUSL_DYNAMIC_LINKER \ - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1" + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1" /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to use the GNU/Linux version, not the generic BPABI version. */ @@ -101,9 +101,12 @@ #undef ASAN_CC1_SPEC #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}" +#define FDPIC_CC1_SPEC "" + #undef CC1_SPEC #define CC1_SPEC \ - LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC, \ + LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \ + FDPIC_CC1_SPEC, \ GNU_USER_TARGET_CC1_SPEC " " ASAN_CC1_SPEC " " \ ANDROID_CC1_SPEC) diff --git a/gcc/config/arm/uclinuxfdpiceabi.h b/gcc/config/arm/uclinuxfdpiceabi.h new file mode 100644 index 0000000..328adcb --- /dev/null +++ b/gcc/config/arm/uclinuxfdpiceabi.h @@ -0,0 +1,54 @@ +/* Configuration file for ARM GNU/Linux FDPIC EABI targets. + Copyright (C) 2018,2019 Free Software Foundation, Inc. + Contributed by STMicroelectronics. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +/* On uClibc EABI GNU/Linux, we want to force -mfdpic by default, + which also means we produce PIE code by default. */ +#undef FDPIC_CC1_SPEC +#define FDPIC_CC1_SPEC \ + "%{!mno-fdpic:-mfdpic %{!fno-PIE:%{!fpie:%{!fPIC:%{!fpic: -fPIE}}}}}" + +/* Add --fdpic assembler flag by default. */ +#undef TARGET_FDPIC_ASM_SPEC +#define TARGET_FDPIC_ASM_SPEC "%{!mno-fdpic: --fdpic}" + +/* TARGET_BIG_ENDIAN_DEFAULT is set in + config.gcc for big endian configurations. */ +#if TARGET_BIG_ENDIAN_DEFAULT +#define TARGET_FDPIC_LINKER_EMULATION "armelfb_linux_fdpiceabi" +#else +#define TARGET_FDPIC_LINKER_EMULATION "armelf_linux_fdpiceabi" +#endif + +/* Unless we generate a shared library or a relocatable object, we + force -pie. */ +/* -static is not supported, because we have to define the + dynamic-linker, as we have some relocations to resolve at load + time. We do not generate an error in case the user explictly passes + the -dynamic-linker option to the linker. */ +#undef SUBTARGET_EXTRA_LINK_SPEC +#define SUBTARGET_EXTRA_LINK_SPEC \ + "%{!mno-fdpic: -m " TARGET_FDPIC_LINKER_EMULATION \ + "%{!shared:%{!r: -pie}} }" \ + "%{mno-fdpic: -m " TARGET_LINKER_EMULATION "}" \ + "%{!r:%{!mno-fdpic: -z now}}" + +#undef STARTFILE_SPEC +#define STARTFILE_SPEC "%{!mno-fdpic:%{!shared:crtreloc.o%s}} " \ + LINUX_OR_ANDROID_LD (GNU_USER_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC) diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt index 3fb90ea..714f292 100644 --- a/libsanitizer/configure.tgt +++ b/libsanitizer/configure.tgt @@ -42,6 +42,9 @@ case "${target}" in ;; sparc*-*-solaris2.11*) ;; + arm*-*-*fdpiceabi) + UNSUPPORTED=1 + ;; arm*-*-linux*) ;; mips*64*-*-linux*) -- 2.6.3 |
[ARM/FDPIC v6 04/24] [ARM] FDPIC: Add support for FDPIC for arm architecture
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
The FDPIC register is hard-coded to r9, as defined in the ABI. We have to disable tailcall optimizations if we don't know if the target function is in the same module. If not, we have to set r9 to the value associated with the target module. When generating a symbol address, we have to take into account whether it is a pointer to data or to a function, because different relocations are needed. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro in FDPIC mode. * config/arm/arm-protos.h (arm_load_function_descriptor): Declare new function. * config/arm/arm.c (arm_option_override): Define pic register to FDPIC_REGNUM. (arm_function_ok_for_sibcall): Disable sibcall optimization if we have no decl or go through PLT. (calculate_pic_address_constant): New function. (legitimize_pic_address): Call calculate_pic_address_constant. (arm_load_pic_register): Handle TARGET_FDPIC. (arm_is_segment_info_known): New function. (arm_pic_static_addr): Add support for FDPIC. (arm_load_function_descriptor): New function. (arm_emit_call_insn): Add support for FDPIC. (arm_assemble_integer): Add support for FDPIC. * config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED): Define. (FDPIC_REGNUM): New define. * config/arm/arm.md (call): Add support for FDPIC. (call_value): Likewise. (restore_pic_register_after_call): New pattern. (untyped_call): Disable if FDPIC. (untyped_return): Likewise. * config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New. gcc/testsuite/ * gcc.target/arm/fp16-aapcs-2.c: Adjust scan-assembler-times. * gcc.target/arm/fp16-aapcs-4.c: Likewise. Change-Id: I1e96d260074ab7b75d36cdff5d34ad898f35c66f diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c index 6e256ee..34695fa 100644 --- a/gcc/config/arm/arm-c.c +++ b/gcc/config/arm/arm-c.c @@ -203,6 +203,8 @@ arm_cpu_builtins (struct cpp_reader* pfile) builtin_define ("__ARM_EABI__"); } + def_or_undef_macro (pfile, "__FDPIC__", TARGET_FDPIC); + def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV); def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV); diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 8386d89..f995974 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -139,6 +139,7 @@ extern int arm_max_const_double_inline_cost (void); extern int arm_const_double_inline_cost (rtx); extern bool arm_const_double_by_parts (rtx); extern bool arm_const_double_by_immediates (rtx); +extern rtx arm_load_function_descriptor (rtx funcdesc); extern void arm_emit_call_insn (rtx, rtx, bool); bool detect_cmse_nonsecure_call (tree); extern const char *output_call (rtx *); diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 8576431..c34aab8 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3456,6 +3456,14 @@ arm_option_override (void) if (flag_pic && TARGET_VXWORKS_RTP) arm_pic_register = 9; + /* If in FDPIC mode then force arm_pic_register to be r9. */ + if (TARGET_FDPIC) + { + arm_pic_register = FDPIC_REGNUM; + if (TARGET_THUMB1) + sorry ("FDPIC mode is not supported in Thumb-1 mode"); + } + if (arm_pic_register_string != NULL) { int pic_register = decode_reg_name (arm_pic_register_string); @@ -7251,6 +7259,15 @@ arm_function_ok_for_sibcall (tree decl, tree exp) if (cfun->machine->sibcall_blocked) return false; + if (TARGET_FDPIC) + { + /* In FDPIC, never tailcall something for which we have no decl: + the target function could be in a different module, requiring + a different FDPIC register value. */ + if (decl == NULL) + return false; + } + /* Never tailcall something if we are generating code for Thumb-1. */ if (TARGET_THUMB1) return false; @@ -7461,6 +7478,24 @@ require_pic_register (rtx pic_reg, bool compute_now) } } +/* Generate insns to calculate the address of ORIG in pic mode. */ +static rtx_insn * +calculate_pic_address_constant (rtx reg, rtx pic_reg, rtx orig) +{ + rtx pat; + rtx mem; + + pat = gen_calculate_pic_address (reg, pic_reg, orig); + + /* Make the MEM as close to a constant as possible. */ + mem = SET_SRC (pat); + gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem)); + MEM_READONLY_P (mem) = 1; + MEM_NOTRAP_P (mem) = 1; + + return emit_insn (pat); +} + /* Legitimize PIC load to ORIG into REG. If REG is NULL, a new pseudo is created to hold the result of the load. If not NULL, PIC_REG indicates which register to use as PIC register, otherwise it is decided by register @@ -7505,24 +7540,13 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg, rtx pic_reg, insn = arm_pic_static_addr (orig, reg); else { - rtx pat; - rtx mem; - /* If this function doesn't have a pic register, create one now. */ require_pic_register (pic_reg, compute_now); if (pic_reg == NULL_RTX) pic_reg = cfun->machine->pic_reg; - pat = gen_calculate_pic_address (reg, pic_reg, orig); - - /* Make the MEM as close to a constant as possible. */ - mem = SET_SRC (pat); - gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem)); - MEM_READONLY_P (mem) = 1; - MEM_NOTRAP_P (mem) = 1; - - insn = emit_insn (pat); + insn = calculate_pic_address_constant (reg, pic_reg, orig); } /* Put a REG_EQUAL note on this insn, so that it can be optimized @@ -7677,7 +7701,9 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg) { rtx l1, labelno, pic_tmp, pic_rtx; - if (crtl->uses_pic_offset_table == 0 || TARGET_SINGLE_PIC_BASE) + if (crtl->uses_pic_offset_table == 0 + || TARGET_SINGLE_PIC_BASE + || TARGET_FDPIC) return; gcc_assert (flag_pic); @@ -7746,28 +7772,128 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED, rtx pic_reg) emit_use (pic_reg); } +/* Try to determine whether an object, referenced via ORIG, will be + placed in the text or data segment. This is used in FDPIC mode, to + decide which relocations to use when accessing ORIG. *IS_READONLY + is set to true if ORIG is a read-only location, false otherwise. + Return true if we could determine the location of ORIG, false + otherwise. *IS_READONLY is valid only when we return true. */ +static bool +arm_is_segment_info_known (rtx orig, bool *is_readonly) +{ + *is_readonly = false; + + if (GET_CODE (orig) == LABEL_REF) + { + *is_readonly = true; + return true; + } + + if (SYMBOL_REF_P (orig)) + { + if (CONSTANT_POOL_ADDRESS_P (orig)) + { + *is_readonly = true; + return true; + } + if (SYMBOL_REF_LOCAL_P (orig) + && !SYMBOL_REF_EXTERNAL_P (orig) + && SYMBOL_REF_DECL (orig) + && (!DECL_P (SYMBOL_REF_DECL (orig)) + || !DECL_COMMON (SYMBOL_REF_DECL (orig)))) + { + tree decl = SYMBOL_REF_DECL (orig); + tree init = (TREE_CODE (decl) == VAR_DECL) + ? DECL_INITIAL (decl) : (TREE_CODE (decl) == CONSTRUCTOR) + ? decl : 0; + int reloc = 0; + bool named_section, readonly; + + if (init && init != error_mark_node) + reloc = compute_reloc_for_constant (init); + + named_section = TREE_CODE (decl) == VAR_DECL + && lookup_attribute ("section", DECL_ATTRIBUTES (decl)); + readonly = decl_readonly_section (decl, reloc); + + /* We don't know where the link script will put a named + section, so return false in such a case. */ + if (named_section) + return false; + + *is_readonly = readonly; + return true; + } + + /* We don't know. */ + return false; + } + + gcc_unreachable (); +} + /* Generate code to load the address of a static var when flag_pic is set. */ static rtx_insn * arm_pic_static_addr (rtx orig, rtx reg) { rtx l1, labelno, offset_rtx; + rtx_insn *insn; gcc_assert (flag_pic); - /* We use an UNSPEC rather than a LABEL_REF because this label - never appears in the code stream. */ - labelno = GEN_INT (pic_labelno++); - l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL); - l1 = gen_rtx_CONST (VOIDmode, l1); + bool is_readonly = false; + bool info_known = false; - /* On the ARM the PC register contains 'dot + 8' at the time of the - addition, on the Thumb it is 'dot + 4'. */ - offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4); - offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx), - UNSPEC_SYMBOL_OFFSET); - offset_rtx = gen_rtx_CONST (Pmode, offset_rtx); + if (TARGET_FDPIC + && SYMBOL_REF_P (orig) + && !SYMBOL_REF_FUNCTION_P (orig)) + info_known = arm_is_segment_info_known (orig, &is_readonly); - return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno)); + if (TARGET_FDPIC + && SYMBOL_REF_P (orig) + && !SYMBOL_REF_FUNCTION_P (orig) + && !info_known) + { + /* We don't know where orig is stored, so we have be + pessimistic and use a GOT relocation. */ + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + + insn = calculate_pic_address_constant (reg, pic_reg, orig); + } + else if (TARGET_FDPIC + && SYMBOL_REF_P (orig) + && (SYMBOL_REF_FUNCTION_P (orig) + || !is_readonly)) + { + /* We use the GOTOFF relocation. */ + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + + rtx l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig), UNSPEC_PIC_SYM); + emit_insn (gen_movsi (reg, l1)); + insn = emit_insn (gen_addsi3 (reg, reg, pic_reg)); + } + else + { + /* Not FDPIC, not SYMBOL_REF_P or readonly: we can use + PC-relative access. */ + /* We use an UNSPEC rather than a LABEL_REF because this label + never appears in the code stream. */ + labelno = GEN_INT (pic_labelno++); + l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL); + l1 = gen_rtx_CONST (VOIDmode, l1); + + /* On the ARM the PC register contains 'dot + 8' at the time of the + addition, on the Thumb it is 'dot + 4'. */ + offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4); + offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx), + UNSPEC_SYMBOL_OFFSET); + offset_rtx = gen_rtx_CONST (Pmode, offset_rtx); + + insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, + labelno)); + } + + return insn; } /* Return nonzero if X is valid as an ARM state addressing register. */ @@ -16051,9 +16177,32 @@ get_jump_table_size (rtx_jump_table_data *insn) return 0; } +/* Emit insns to load the function address from FUNCDESC (an FDPIC + function descriptor) into a register and the GOT address into the + FDPIC register, returning an rtx for the register holding the + function address. */ + +rtx +arm_load_function_descriptor (rtx funcdesc) +{ + rtx fnaddr_reg = gen_reg_rtx (Pmode); + rtx pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc); + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4)); + + emit_move_insn (fnaddr_reg, fnaddr); + + /* The ABI requires the entry point address to be loaded first, but + since we cannot support lazy binding for lack of atomic load of + two 32-bits values, we do not need to bother to prevent the + previous load from being moved after that of the GOT address. */ + emit_insn (gen_restore_pic_register_after_call (pic_reg, gotaddr)); + + return fnaddr_reg; +} + /* Return the maximum amount of padding that will be inserted before label LABEL. */ - static HOST_WIDE_INT get_label_padding (rtx label) { @@ -18188,6 +18337,12 @@ arm_emit_call_insn (rtx pat, rtx addr, bool sibcall) use_reg (&CALL_INSN_FUNCTION_USAGE (insn), cfun->machine->pic_reg); } + if (TARGET_FDPIC) + { + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + use_reg (&CALL_INSN_FUNCTION_USAGE (insn), fdpic_reg); + } + if (TARGET_AAPCS_BASED) { /* For AAPCS, IP and CC can be clobbered by veneers inserted by the @@ -23010,10 +23165,36 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p) && (!SYMBOL_REF_LOCAL_P (x) || (SYMBOL_REF_DECL (x) ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0)))) - fputs ("(GOT)", asm_out_file); + { + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x)) + fputs ("(GOTFUNCDESC)", asm_out_file); + else + fputs ("(GOT)", asm_out_file); + } else - fputs ("(GOTOFF)", asm_out_file); + { + if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x)) + fputs ("(GOTOFFFUNCDESC)", asm_out_file); + else + { + bool is_readonly; + + if (!TARGET_FDPIC + || arm_is_segment_info_known (x, &is_readonly)) + fputs ("(GOTOFF)", asm_out_file); + else + fputs ("(GOT)", asm_out_file); + } + } } + + /* For FDPIC we also have to mark symbol for .data section. */ + if (TARGET_FDPIC + && !making_const_table + && SYMBOL_REF_P (x) + && SYMBOL_REF_FUNCTION_P (x)) + fputs ("(FUNCDESC)", asm_out_file); + fputc ('\n', asm_out_file); return true; } diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8b92c83..e404e2c 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -885,6 +885,9 @@ extern int arm_arch_cmse; Pascal), so the following is not true. */ #define STATIC_CHAIN_REGNUM 12 +/* r9 is the FDPIC register (base register for GOT and FUNCDESC accesses). */ +#define FDPIC_REGNUM 9 + /* Define this to be where the real frame pointer is if it is not possible to work out the offset between the frame pointer and the automatic variables until after register allocation has taken place. FRAME_POINTER_REGNUM @@ -1941,6 +1944,10 @@ extern unsigned arm_pic_register; data addresses in memory. */ #define PIC_OFFSET_TABLE_REGNUM arm_pic_register +/* For FDPIC, the FDPIC register is call-clobbered (otherwise PLT + entries would need to handle saving and restoring it). */ +#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED TARGET_FDPIC + /* We can't directly access anything that contains a symbol, nor can we indirect via the constant pool. One exception is UNSPEC_TLS, which is always PIC. */ diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index e236831..027febb 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -7601,6 +7601,11 @@ : !REG_P (callee)) XEXP (operands[0], 0) = force_reg (Pmode, callee); + if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[0], 0))) + /* Indirect call: set r9 with FDPIC value of callee. */ + XEXP (operands[0], 0) + = arm_load_function_descriptor (XEXP (operands[0], 0)); + if (detect_cmse_nonsecure_call (addr)) { pat = gen_nonsecure_call_internal (operands[0], operands[1], @@ -7612,10 +7617,33 @@ pat = gen_call_internal (operands[0], operands[1], operands[2]); arm_emit_call_insn (pat, XEXP (operands[0], 0), false); } + + /* Restore FDPIC register (r9) after call. */ + if (TARGET_FDPIC) + { + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + rtx initial_fdpic_reg + = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM); + + emit_insn (gen_restore_pic_register_after_call (fdpic_reg, + initial_fdpic_reg)); + } + DONE; }" ) +(define_insn "restore_pic_register_after_call" + [(set (match_operand:SI 0 "s_register_operand" "+r,r") + (unspec:SI [(match_dup 0) + (match_operand:SI 1 "nonimmediate_operand" "r,m")] + UNSPEC_PIC_RESTORE))] + "" + "@ + mov\t%0, %1 + ldr\t%0, %1" +) + (define_expand "call_internal" [(parallel [(call (match_operand 0 "memory_operand") (match_operand 1 "general_operand")) @@ -7689,6 +7717,11 @@ : !REG_P (callee)) XEXP (operands[1], 0) = force_reg (Pmode, callee); + if (TARGET_FDPIC && !SYMBOL_REF_P (XEXP (operands[1], 0))) + /* Indirect call: set r9 with FDPIC value of callee. */ + XEXP (operands[1], 0) + = arm_load_function_descriptor (XEXP (operands[1], 0)); + if (detect_cmse_nonsecure_call (addr)) { pat = gen_nonsecure_call_value_internal (operands[0], operands[1], @@ -7701,6 +7734,18 @@ operands[2], operands[3]); arm_emit_call_insn (pat, XEXP (operands[1], 0), false); } + + /* Restore FDPIC register (r9) after call. */ + if (TARGET_FDPIC) + { + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + rtx initial_fdpic_reg + = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM); + + emit_insn (gen_restore_pic_register_after_call (fdpic_reg, + initial_fdpic_reg)); + } + DONE; }" ) @@ -8043,7 +8088,7 @@ (const_int 0)) (match_operand 1 "" "") (match_operand 2 "" "")])] - "TARGET_EITHER" + "TARGET_EITHER && !TARGET_FDPIC" " { int i; @@ -8110,7 +8155,7 @@ (define_expand "untyped_return" [(match_operand:BLK 0 "memory_operand") (match_operand 1 "" "")] - "TARGET_EITHER" + "TARGET_EITHER && !TARGET_FDPIC" " { int i; diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md index 41068ba..a9f99d0 100644 --- a/gcc/config/arm/unspecs.md +++ b/gcc/config/arm/unspecs.md @@ -89,6 +89,7 @@ UNSPEC_SP_SET ; Represent the setting of stack protector's canary UNSPEC_SP_TEST ; Represent the testing of stack protector's canary ; against the guard. + UNSPEC_PIC_RESTORE ; Use to restore fdpic register ]) (define_c_enum "unspec" [ diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c index 4753e36..51a76fc 100644 --- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c +++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c @@ -17,5 +17,5 @@ F (__fp16 a, __fp16 b, __fp16 c) } /* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */ -/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */ +/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */ /* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c index 41c7ab7..ae65fb8 100644 --- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c +++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c @@ -16,5 +16,5 @@ F (__fp16 a, __fp16 b, __fp16 c) } /* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */ -/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */ +/* { dg-final { scan-assembler-times {mov\tr1, r[03]} 1 } } */ /* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */ -- 2.6.3 |
[ARM/FDPIC v6 05/24] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy are referenced by their address, not by pointers to the function descriptors. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> libgcc/ * libgcc/crtstuff.c: Add support for FDPIC. Change-Id: I0bc4b1232fbf3c69068fb23a1b9cafc895d141b1 diff --git a/libgcc/crtstuff.c b/libgcc/crtstuff.c index c8a8e2c..c93e1cb 100644 --- a/libgcc/crtstuff.c +++ b/libgcc/crtstuff.c @@ -429,9 +429,17 @@ __do_global_dtors_aux (void) #ifdef FINI_SECTION_ASM_OP CRT_CALL_STATIC_FUNCTION (FINI_SECTION_ASM_OP, __do_global_dtors_aux) #elif defined (FINI_ARRAY_SECTION_ASM_OP) +#if defined(__FDPIC__) +__asm__("\t.equ\t__do_global_dtors_aux_alias, __do_global_dtors_aux\n"); +extern char __do_global_dtors_aux_alias; +static void *__do_global_dtors_aux_fini_array_entry[] +__attribute__ ((__used__, section(".fini_array"), aligned(sizeof(void *)))) + = { &__do_global_dtors_aux_alias }; +#else /* defined(__FDPIC__) */ static func_ptr __do_global_dtors_aux_fini_array_entry[] __attribute__ ((__used__, section(".fini_array"), aligned(__alignof__(func_ptr)))) = { __do_global_dtors_aux }; +#endif /* defined(__FDPIC__) */ #else /* !FINI_SECTION_ASM_OP && !FINI_ARRAY_SECTION_ASM_OP */ static void __attribute__((used)) __do_global_dtors_aux_1 (void) @@ -473,9 +481,17 @@ frame_dummy (void) #ifdef __LIBGCC_INIT_SECTION_ASM_OP__ CRT_CALL_STATIC_FUNCTION (__LIBGCC_INIT_SECTION_ASM_OP__, frame_dummy) #else /* defined(__LIBGCC_INIT_SECTION_ASM_OP__) */ +#if defined(__FDPIC__) +__asm__("\t.equ\t__frame_dummy_alias, frame_dummy\n"); +extern char __frame_dummy_alias; +static void *__frame_dummy_init_array_entry[] +__attribute__ ((__used__, section(".init_array"), aligned(sizeof(void *)))) + = { &__frame_dummy_alias }; +#else /* defined(__FDPIC__) */ static func_ptr __frame_dummy_init_array_entry[] __attribute__ ((__used__, section(".init_array"), aligned(__alignof__(func_ptr)))) = { frame_dummy }; +#endif /* defined(__FDPIC__) */ #endif /* !defined(__LIBGCC_INIT_SECTION_ASM_OP__) */ #endif /* USE_EH_FRAME_REGISTRY || USE_TM_CLONE_REGISTRY */ -- 2.6.3 |
[ARM/FDPIC v6 06/24] [ARM] FDPIC: Add support for c++ exceptions
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
The main difference with existing support is that function addresses are function descriptor addresses instead. This means that all code dealing with function pointers now has to cope with function descriptors instead. For the same reason, Linux kernel helpers can no longer be called by dereferencing their address, so we implement wrappers that directly call the kernel helpers. When restoring a function address, we also have to restore the FDPIC register value (r9). 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5 field. libgcc/ * config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support. (__kernel_dmb): Likewise. (__fdpic_cmpxchg): New function. (__fdpic_dmb): New function. * config/arm/unwind-arm.h (FDPIC_REGNUM): New define. (gnu_Unwind_Find_got): New function. (_Unwind_decode_typeinfo_ptr): Add FDPIC support. * unwind-arm-common.inc (UCB_PR_GOT): New. (funcdesc_t): New struct. (get_eit_entry): Add FDPIC support. (unwind_phase2): Likewise. (unwind_phase2_forced): Likewise. (__gnu_Unwind_RaiseException): Likewise. (__gnu_Unwind_Resume): Likewise. (__gnu_Unwind_Backtrace): Likewise. * unwind-pe.h (read_encoded_value_with_base): Likewise. libstdc++/ * libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC support. Change-Id: I64b81cfaf390a05f2fd121f44ba1912cb4b47cae diff --git a/gcc/ginclude/unwind-arm-common.h b/gcc/ginclude/unwind-arm-common.h index 6df783e..d4eb03e 100644 --- a/gcc/ginclude/unwind-arm-common.h +++ b/gcc/ginclude/unwind-arm-common.h @@ -91,7 +91,7 @@ extern "C" { _uw reserved2; /* Personality routine address */ _uw reserved3; /* Saved callsite address */ _uw reserved4; /* Forced unwind stop arg */ - _uw reserved5; + _uw reserved5; /* Personality routine GOT value in FDPIC mode. */ } unwinder_cache; /* Propagation barrier cache (valid after phase 1): */ diff --git a/libgcc/config/arm/linux-atomic.c b/libgcc/config/arm/linux-atomic.c index 06a6d46..565f829 100644 --- a/libgcc/config/arm/linux-atomic.c +++ b/libgcc/config/arm/linux-atomic.c @@ -25,11 +25,62 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* Kernel helper for compare-and-exchange. */ typedef int (__kernel_cmpxchg_t) (int oldval, int newval, int *ptr); -#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0) + +#define STR(X) #X +#define XSTR(X) STR(X) + +#define KERNEL_CMPXCHG 0xffff0fc0 + +#if __FDPIC__ +/* Non-FDPIC ABIs call __kernel_cmpxchg directly by dereferencing its + address, but under FDPIC we would generate a broken call + sequence. That's why we have to implement __kernel_cmpxchg and + __kernel_dmb here: this way, the FDPIC call sequence works. */ +#define __kernel_cmpxchg __fdpic_cmpxchg +#else +#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) KERNEL_CMPXCHG) +#endif /* Kernel helper for memory barrier. */ typedef void (__kernel_dmb_t) (void); -#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0) + +#define KERNEL_DMB 0xffff0fa0 + +#if __FDPIC__ +#define __kernel_dmb __fdpic_dmb +#else +#define __kernel_dmb (*(__kernel_dmb_t *) KERNEL_DMB) +#endif + +#if __FDPIC__ +static int __fdpic_cmpxchg (int oldval, int newval, int *ptr) +{ + int result; + + asm volatile ( + "ldr ip, 1f\n\t" + "bx ip\n\t" + "1:\n\t" + ".word " XSTR(KERNEL_CMPXCHG) "\n\t" + : "=r" (result) + : "r" (oldval) , "r" (newval), "r" (ptr) + : "r3", "memory"); + /* The result is actually returned by the kernel helper, we need + this to avoid a warning. */ + return result; +} + +static void __fdpic_dmb (void) +{ + asm volatile ( + "ldr ip, 1f\n\t" + "bx ip\n\t" + "1:\n\t" + ".word " XSTR(KERNEL_DMB) "\n\t" + ); +} + +#endif /* Note: we implement byte, short and int versions of atomic operations using the above kernel helpers; see linux-atomic-64bit.c for "long long" (64-bit) diff --git a/libgcc/config/arm/unwind-arm.h b/libgcc/config/arm/unwind-arm.h index 43c5379..2bf320a 100644 --- a/libgcc/config/arm/unwind-arm.h +++ b/libgcc/config/arm/unwind-arm.h @@ -33,9 +33,33 @@ /* Use IP as a scratch register within the personality routine. */ #define UNWIND_POINTER_REG 12 +#define FDPIC_REGNUM 9 + +#define STR(x) #x +#define XSTR(x) STR(x) + #ifdef __cplusplus extern "C" { #endif +_Unwind_Ptr __attribute__((weak)) __gnu_Unwind_Find_got (_Unwind_Ptr); + +static inline _Unwind_Ptr gnu_Unwind_Find_got (_Unwind_Ptr ptr) +{ + _Unwind_Ptr res; + + if (__gnu_Unwind_Find_got) + res = __gnu_Unwind_Find_got (ptr); + else + { + asm volatile ("mov %[result], r" XSTR(FDPIC_REGNUM) + : [result]"=r" (res) + : + :); + } + + return res; +} + /* Decode an R_ARM_TARGET2 relocation. */ static inline _Unwind_Word _Unwind_decode_typeinfo_ptr (_Unwind_Word base __attribute__ ((unused)), @@ -48,7 +72,12 @@ extern "C" { if (!tmp) return 0; -#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \ +#if __FDPIC__ + /* For FDPIC, we store the offset of the GOT entry. */ + /* So, first get GOT from dynamic linker and then use indirect access. */ + tmp += gnu_Unwind_Find_got (ptr); + tmp = *(_Unwind_Word *) tmp; +#elif (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__) \ || defined(__FreeBSD__) || defined(__fuchsia__) /* Pc-relative indirect. */ #define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel | DW_EH_PE_indirect) diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc index fd572fe..0bacc11 100644 --- a/libgcc/unwind-arm-common.inc +++ b/libgcc/unwind-arm-common.inc @@ -62,6 +62,7 @@ __gnu_Unwind_Find_exidx (_Unwind_Ptr, int *); #define UCB_PR_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved2) #define UCB_SAVED_CALLSITE_ADDR(ucbp) ((ucbp)->unwinder_cache.reserved3) #define UCB_FORCED_STOP_ARG(ucbp) ((ucbp)->unwinder_cache.reserved4) +#define UCB_PR_GOT(ucbp) ((ucbp)->unwinder_cache.reserved5) /* Unwind descriptors. */ @@ -85,6 +86,16 @@ typedef struct __EIT_entry _uw content; } __EIT_entry; +#ifdef __FDPIC__ + +/* Only used in FDPIC case. */ +struct funcdesc_t +{ + unsigned int ptr; + unsigned int got; +}; +#endif + /* Assembly helper functions. */ /* Restore core register state. Never returns. */ @@ -259,7 +270,21 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) { /* One of the predefined standard routines. */ _uw idx = (*(_uw *) ucbp->pr_cache.ehtp >> 24) & 0xf; +#if __FDPIC__ + { + struct funcdesc_t *funcdesc + = (struct funcdesc_t *) __gnu_unwind_get_pr_addr (idx); + if (funcdesc) + { + UCB_PR_ADDR (ucbp) = funcdesc->ptr; + UCB_PR_GOT (ucbp) = funcdesc->got; + } + else + UCB_PR_ADDR (ucbp) = 0; + } +#else UCB_PR_ADDR (ucbp) = __gnu_unwind_get_pr_addr (idx); +#endif if (UCB_PR_ADDR (ucbp) == 0) { /* Failed */ @@ -270,6 +295,10 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) { /* Execute region offset to PR */ UCB_PR_ADDR (ucbp) = selfrel_offset31 (ucbp->pr_cache.ehtp); +#if __FDPIC__ + UCB_PR_GOT (ucbp) + = (unsigned int) gnu_Unwind_Find_got ((_Unwind_Ptr) UCB_PR_ADDR (ucbp)); +#endif } return _URC_OK; } @@ -291,14 +320,29 @@ unwind_phase2 (_Unwind_Control_Block * ucbp, phase2_vrs * vrs) UCB_SAVED_CALLSITE_ADDR (ucbp) = VRS_PC(vrs); /* Call the pr to decide what to do. */ +#if __FDPIC__ + { + volatile struct funcdesc_t funcdesc; + funcdesc.ptr = UCB_PR_ADDR (ucbp); + funcdesc.got = UCB_PR_GOT (ucbp); + pr_result = ((personality_routine) &funcdesc) + (_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs); + } +#else pr_result = ((personality_routine) UCB_PR_ADDR (ucbp)) (_US_UNWIND_FRAME_STARTING, ucbp, (_Unwind_Context *) vrs); +#endif } while (pr_result == _URC_CONTINUE_UNWIND); if (pr_result != _URC_INSTALL_CONTEXT) abort(); +#if __FDPIC__ + /* r9 could have been lost due to PLT jump. Restore correct value. */ + vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (vrs)); +#endif + uw_restore_core_regs (vrs, &vrs->core); } @@ -346,8 +390,18 @@ unwind_phase2_forced (_Unwind_Control_Block *ucbp, phase2_vrs *entry_vrs, next_vrs = saved_vrs; /* Call the pr to decide what to do. */ +#if __FDPIC__ + { + volatile struct funcdesc_t funcdesc; + funcdesc.ptr = UCB_PR_ADDR (ucbp); + funcdesc.got = UCB_PR_GOT (ucbp); + pr_result = ((personality_routine) &funcdesc) + (action, ucbp, (void *) &next_vrs); + } +#else pr_result = ((personality_routine) UCB_PR_ADDR (ucbp)) (action, ucbp, (void *) &next_vrs); +#endif saved_vrs.prev_sp = VRS_SP (&next_vrs); } @@ -384,6 +438,11 @@ unwind_phase2_forced (_Unwind_Control_Block *ucbp, phase2_vrs *entry_vrs, return _URC_FAILURE; } +#if __FDPIC__ + /* r9 could have been lost due to PLT jump. Restore correct value. */ + saved_vrs.core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (&saved_vrs)); +#endif + uw_restore_core_regs (&saved_vrs, &saved_vrs.core); } @@ -429,8 +488,18 @@ __gnu_Unwind_RaiseException (_Unwind_Control_Block * ucbp, return _URC_FAILURE; /* Call the pr to decide what to do. */ +#if __FDPIC__ + { + volatile struct funcdesc_t funcdesc; + funcdesc.ptr = UCB_PR_ADDR (ucbp); + funcdesc.got = UCB_PR_GOT (ucbp); + pr_result = ((personality_routine) &funcdesc) + (_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs); + } +#else pr_result = ((personality_routine) UCB_PR_ADDR (ucbp)) (_US_VIRTUAL_UNWIND_FRAME, ucbp, (void *) &saved_vrs); +#endif } while (pr_result == _URC_CONTINUE_UNWIND); @@ -488,13 +557,27 @@ __gnu_Unwind_Resume (_Unwind_Control_Block * ucbp, phase2_vrs * entry_vrs) } /* Call the cached PR. */ +#if __FDPIC__ + { + volatile struct funcdesc_t funcdesc; + funcdesc.ptr = UCB_PR_ADDR (ucbp); + funcdesc.got = UCB_PR_GOT (ucbp); + pr_result = ((personality_routine) &funcdesc) + (_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs); + } +#else pr_result = ((personality_routine) UCB_PR_ADDR (ucbp)) (_US_UNWIND_FRAME_RESUME, ucbp, (_Unwind_Context *) entry_vrs); +#endif switch (pr_result) { case _URC_INSTALL_CONTEXT: /* Upload the registers to enter the landing pad. */ +#if __FDPIC__ + /* r9 could have been lost due to PLT jump. Restore correct value. */ + entry_vrs->core.r[FDPIC_REGNUM] = gnu_Unwind_Find_got (VRS_PC (entry_vrs)); +#endif uw_restore_core_regs (entry_vrs, &entry_vrs->core); case _URC_CONTINUE_UNWIND: @@ -586,9 +669,20 @@ __gnu_Unwind_Backtrace(_Unwind_Trace_Fn trace, void * trace_argument, } /* Call the pr to decide what to do. */ +#if __FDPIC__ + { + volatile struct funcdesc_t funcdesc; + funcdesc.ptr = UCB_PR_ADDR (ucbp); + funcdesc.got = UCB_PR_GOT (ucbp); + code = ((personality_routine) &funcdesc) + (_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND, + ucbp, (void *) &saved_vrs); + } +#else code = ((personality_routine) UCB_PR_ADDR (ucbp)) (_US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND, ucbp, (void *) &saved_vrs); +#endif } while (code != _URC_END_OF_STACK && code != _URC_FAILURE); diff --git a/libgcc/unwind-pe.h b/libgcc/unwind-pe.h index 4ed1c66..1c9dae5 100644 --- a/libgcc/unwind-pe.h +++ b/libgcc/unwind-pe.h @@ -262,10 +262,27 @@ read_encoded_value_with_base (unsigned char encoding, _Unwind_Ptr base, if (result != 0) { +#if __FDPIC__ + /* FDPIC relative addresses imply taking the GOT address + into account. */ + if ((encoding & DW_EH_PE_pcrel) && (encoding & DW_EH_PE_indirect)) + { + result += gnu_Unwind_Find_got ((_Unwind_Ptr) u); + result = *(_Unwind_Internal_Ptr *) result; + } + else + { + result += ((encoding & 0x70) == DW_EH_PE_pcrel + ? (_Unwind_Internal_Ptr) u : base); + if (encoding & DW_EH_PE_indirect) + result = *(_Unwind_Internal_Ptr *) result; + } +#else result += ((encoding & 0x70) == DW_EH_PE_pcrel ? (_Unwind_Internal_Ptr) u : base); if (encoding & DW_EH_PE_indirect) result = *(_Unwind_Internal_Ptr *) result; +#endif } } diff --git a/libstdc++-v3/libsupc++/eh_personality.cc b/libstdc++-v3/libsupc++/eh_personality.cc index 35e4e46..1528ab9 100644 --- a/libstdc++-v3/libsupc++/eh_personality.cc +++ b/libstdc++-v3/libsupc++/eh_personality.cc @@ -93,7 +93,15 @@ get_ttype_entry (lsda_header_info *info, _uleb128_t i) _Unwind_Ptr ptr; i *= size_of_encoded_value (info->ttype_encoding); - read_encoded_value_with_base (info->ttype_encoding, info->ttype_base, + read_encoded_value_with_base ( +#if __FDPIC__ + /* Force these flags to nake sure to + take the GOT into account. */ + (DW_EH_PE_pcrel | DW_EH_PE_indirect), +#else + info->ttype_encoding, +#endif + info->ttype_base, info->TType - i, &ptr); return reinterpret_cast<const std::type_info *>(ptr); -- 2.6.3 |
[ARM/FDPIC v6 07/24] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is read-only
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper. * config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle FDPIC. Change-Id: I0f3b2023ab2a2a0433dfe081dac6bbb194b7a76c diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index c34aab8..6ff3001 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -19571,9 +19571,7 @@ arm_compute_save_reg0_reg12_mask (void) save_reg_mask |= (1 << reg); /* Also save the pic base register if necessary. */ - if (flag_pic - && !TARGET_SINGLE_PIC_BASE - && arm_pic_register != INVALID_REGNUM + if (PIC_REGISTER_MAY_NEED_SAVING && crtl->uses_pic_offset_table) save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM; } @@ -19605,9 +19603,7 @@ arm_compute_save_reg0_reg12_mask (void) /* If we aren't loading the PIC register, don't stack it even though it may be live. */ - if (flag_pic - && !TARGET_SINGLE_PIC_BASE - && arm_pic_register != INVALID_REGNUM + if (PIC_REGISTER_MAY_NEED_SAVING && (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM) || crtl->uses_pic_offset_table)) save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM; diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index e404e2c..490d22d 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1960,6 +1960,13 @@ extern unsigned arm_pic_register; || label_mentioned_p (get_pool_constant (X))))) \ || tls_mentioned_p (X)) +/* We may want to save the PIC register if it is a dedicated one. */ +#define PIC_REGISTER_MAY_NEED_SAVING \ + (flag_pic \ + && !TARGET_SINGLE_PIC_BASE \ + && !TARGET_FDPIC \ + && arm_pic_register != INVALID_REGNUM) + /* We need to know when we are making a constant pool; this determines whether data needs to be in the GOT or can be referenced via a GOT offset. */ -- 2.6.3 |
[ARM/FDPIC v6 08/24] [ARM] FDPIC: Enforce local/global binding for function descriptors
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
Use local binding rules to decide whether we can use GOTOFFFUNCDESC to compute the function address. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config/arm/arm.c (arm_fdpic_local_funcdesc_p): New function. (legitimize_pic_address): Enforce binding rules on function pointers in FDPIC mode. (arm_assemble_integer): Likewise. Change-Id: I3fa0b63bc0f672903f405aa72cc46052de1c0feb diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6ff3001..6b0c95f 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3754,6 +3754,42 @@ arm_options_perform_arch_sanity_checks (void) } } +/* Test whether a local function descriptor is canonical, i.e., + whether we can use GOTOFFFUNCDESC to compute the address of the + function. */ +static bool +arm_fdpic_local_funcdesc_p (rtx fnx) +{ + tree fn; + enum symbol_visibility vis; + bool ret; + + if (!TARGET_FDPIC) + return true; + + if (! SYMBOL_REF_LOCAL_P (fnx)) + return false; + + fn = SYMBOL_REF_DECL (fnx); + + if (! fn) + return false; + + vis = DECL_VISIBILITY (fn); + + if (vis == VISIBILITY_PROTECTED) + /* Private function descriptors for protected functions are not + canonical. Temporarily change the visibility to global so that + we can ensure uniqueness of funcdesc pointers. */ + DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT; + + ret = default_binds_local_p_1 (fn, flag_pic); + + DECL_VISIBILITY (fn) = vis; + + return ret; +} + static void arm_add_gc_roots (void) { @@ -7534,7 +7570,9 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg, rtx pic_reg, || (GET_CODE (orig) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (orig) && (SYMBOL_REF_DECL (orig) - ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1))) + ? !DECL_WEAK (SYMBOL_REF_DECL (orig)) : 1) + && (!SYMBOL_REF_FUNCTION_P (orig) + || arm_fdpic_local_funcdesc_p (orig)))) && NEED_GOT_RELOC && arm_pic_data_is_text_relative) insn = arm_pic_static_addr (orig, reg); @@ -23160,7 +23198,9 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p) || (GET_CODE (x) == SYMBOL_REF && (!SYMBOL_REF_LOCAL_P (x) || (SYMBOL_REF_DECL (x) - ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0)))) + ? DECL_WEAK (SYMBOL_REF_DECL (x)) : 0) + || (SYMBOL_REF_FUNCTION_P (x) + && !arm_fdpic_local_funcdesc_p (x))))) { if (TARGET_FDPIC && SYMBOL_REF_FUNCTION_P (x)) fputs ("(GOTFUNCDESC)", asm_out_file); -- 2.6.3 |
[ARM/FDPIC v6 09/24] [ARM] FDPIC: Add support for taking address of nested function
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
In FDPIC mode, the trampoline generated to support pointers to nested functions looks like: .word trampoline address .word trampoline GOT address ldr r12, [pc, #8] ldr r9, [pc, #8] ldr pc, [pc, #8] .word static chain value .word GOT address .word function's address because in FDPIC function pointers are actually pointers to function descriptors, we have to actually generate a function descriptor for the trampoline. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC support. (arm_trampoline_init): Likewise. (arm_trampoline_adjust_address): Likewise. * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise. Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6b0c95f..d01fae3 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3939,14 +3939,52 @@ arm_warn_func_return (tree decl) ldr pc, [pc] .word static chain value .word function's address - XXX FIXME: When the trampoline returns, r8 will be clobbered. */ + XXX FIXME: When the trampoline returns, r8 will be clobbered. + + In FDPIC mode, the trampoline looks like: + .word trampoline address + .word trampoline GOT address + ldr r12, [pc, #8] ; #4 for Arm mode + ldr r9, [pc, #8] ; #4 for Arm mode + ldr pc, [pc, #8] ; #4 for Arm mode + .word static chain value + .word GOT address + .word function's address +*/ static void arm_asm_trampoline_template (FILE *f) { fprintf (f, "\t.syntax unified\n"); - if (TARGET_ARM) + if (TARGET_FDPIC) + { + /* The first two words are a function descriptor pointing to the + trampoline code just below. */ + if (TARGET_ARM) + fprintf (f, "\t.arm\n"); + else if (TARGET_THUMB2) + fprintf (f, "\t.thumb\n"); + else + /* Only ARM and Thumb-2 are supported. */ + gcc_unreachable (); + + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + /* Trampoline code which sets the static chain register but also + PIC register before jumping into real code. */ + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + STATIC_CHAIN_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + PIC_OFFSET_TABLE_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + PC_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + } + else if (TARGET_ARM) { fprintf (f, "\t.arm\n"); asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM); @@ -3987,12 +4025,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) emit_block_move (m_tramp, assemble_trampoline_template (), GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL); - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12); - emit_move_insn (mem, chain_value); + if (TARGET_FDPIC) + { + rtx funcdesc = XEXP (DECL_RTL (fndecl), 0); + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc); + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4)); + /* The function start address is at offset 8, but in Thumb mode + we want bit 0 set to 1 to indicate Thumb-ness, hence 9 + below. */ + rtx trampoline_code_start + = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8); + + /* Write initial funcdesc which points to the trampoline. */ + mem = adjust_address (m_tramp, SImode, 0); + emit_move_insn (mem, trampoline_code_start); + mem = adjust_address (m_tramp, SImode, 4); + emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM)); + /* Setup static chain. */ + mem = adjust_address (m_tramp, SImode, 20); + emit_move_insn (mem, chain_value); + /* GOT + real function entry point. */ + mem = adjust_address (m_tramp, SImode, 24); + emit_move_insn (mem, gotaddr); + mem = adjust_address (m_tramp, SImode, 28); + emit_move_insn (mem, fnaddr); + } + else + { + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12); + emit_move_insn (mem, chain_value); - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16); - fnaddr = XEXP (DECL_RTL (fndecl), 0); - emit_move_insn (mem, fnaddr); + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16); + fnaddr = XEXP (DECL_RTL (fndecl), 0); + emit_move_insn (mem, fnaddr); + } a_tramp = XEXP (m_tramp, 0); emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), @@ -4006,7 +4072,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) static rtx arm_trampoline_adjust_address (rtx addr) { - if (TARGET_THUMB) + /* For FDPIC don't fix trampoline address since it's a function + descriptor and not a function address. */ + if (TARGET_THUMB && !TARGET_FDPIC) addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx, NULL, 0, OPTAB_LIB_WIDEN); return addr; diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 490d22d..8b67c9c 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1595,7 +1595,7 @@ typedef struct #define INIT_EXPANDERS arm_init_expanders () /* Length in units of the trampoline for entering a nested function. */ -#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20) +#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20)) /* Alignment required for a trampoline in bits. */ #define TRAMPOLINE_ALIGNMENT 32 -- 2.6.3 |
[ARM/FDPIC v6 10/24] [ARM] FDPIC: Implement TLS support.
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and TLS_IE32_FDPIC. We do not support the GNU2 TLS dialect. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC, TLS_LDM32_FDPIC and TLS_IE32_FDPIC. (arm_call_tls_get_addr): Add FDPIC support. (legitimize_tls_address): Likewise. (arm_emit_tls_decoration): Likewise. Change-Id: I4ea5034ff654540c4658d0a79fb92f70550cdf4a diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index d01fae3..5f1d2d4 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2350,9 +2350,12 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__"; enum tls_reloc { TLS_GD32, + TLS_GD32_FDPIC, TLS_LDM32, + TLS_LDM32_FDPIC, TLS_LDO32, TLS_IE32, + TLS_IE32_FDPIC, TLS_LE32, TLS_DESCSEQ /* GNU scheme */ }; @@ -8708,22 +8711,33 @@ load_tls_operand (rtx x, rtx reg) static rtx_insn * arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc) { - rtx label, labelno, sum; + rtx label, labelno = NULL_RTX, sum; gcc_assert (reloc != TLS_DESCSEQ); start_sequence (); - labelno = GEN_INT (pic_labelno++); - label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL); - label = gen_rtx_CONST (VOIDmode, label); + if (TARGET_FDPIC) + { + sum = gen_rtx_UNSPEC (Pmode, + gen_rtvec (2, x, GEN_INT (reloc)), + UNSPEC_TLS); + } + else + { + labelno = GEN_INT (pic_labelno++); + label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL); + label = gen_rtx_CONST (VOIDmode, label); - sum = gen_rtx_UNSPEC (Pmode, - gen_rtvec (4, x, GEN_INT (reloc), label, - GEN_INT (TARGET_ARM ? 8 : 4)), - UNSPEC_TLS); + sum = gen_rtx_UNSPEC (Pmode, + gen_rtvec (4, x, GEN_INT (reloc), label, + GEN_INT (TARGET_ARM ? 8 : 4)), + UNSPEC_TLS); + } reg = load_tls_operand (sum, reg); - if (TARGET_ARM) + if (TARGET_FDPIC) + emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM))); + else if (TARGET_ARM) emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno)); else emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno)); @@ -8761,6 +8775,7 @@ arm_tls_descseq_addr (rtx x, rtx reg) return reg; } + rtx legitimize_tls_address (rtx x, rtx reg) { @@ -8773,6 +8788,8 @@ legitimize_tls_address (rtx x, rtx reg) case TLS_MODEL_GLOBAL_DYNAMIC: if (TARGET_GNU2_TLS) { + gcc_assert (!TARGET_FDPIC); + reg = arm_tls_descseq_addr (x, reg); tp = arm_load_tp (NULL_RTX); @@ -8782,7 +8799,10 @@ legitimize_tls_address (rtx x, rtx reg) else { /* Original scheme */ - insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32); + if (TARGET_FDPIC) + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32_FDPIC); + else + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_GD32); dest = gen_reg_rtx (Pmode); emit_libcall_block (insns, dest, ret, x); } @@ -8791,6 +8811,8 @@ legitimize_tls_address (rtx x, rtx reg) case TLS_MODEL_LOCAL_DYNAMIC: if (TARGET_GNU2_TLS) { + gcc_assert (!TARGET_FDPIC); + reg = arm_tls_descseq_addr (x, reg); tp = arm_load_tp (NULL_RTX); @@ -8799,7 +8821,10 @@ legitimize_tls_address (rtx x, rtx reg) } else { - insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32); + if (TARGET_FDPIC) + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32_FDPIC); + else + insns = arm_call_tls_get_addr (x, reg, &ret, TLS_LDM32); /* Attach a unique REG_EQUIV, to allow the RTL optimizers to share the LDM result with other LD model accesses. */ @@ -8818,23 +8843,35 @@ legitimize_tls_address (rtx x, rtx reg) return dest; case TLS_MODEL_INITIAL_EXEC: - labelno = GEN_INT (pic_labelno++); - label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL); - label = gen_rtx_CONST (VOIDmode, label); - sum = gen_rtx_UNSPEC (Pmode, - gen_rtvec (4, x, GEN_INT (TLS_IE32), label, - GEN_INT (TARGET_ARM ? 8 : 4)), - UNSPEC_TLS); - reg = load_tls_operand (sum, reg); - - if (TARGET_ARM) - emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno)); - else if (TARGET_THUMB2) - emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno)); + if (TARGET_FDPIC) + { + sum = gen_rtx_UNSPEC (Pmode, + gen_rtvec (2, x, GEN_INT (TLS_IE32_FDPIC)), + UNSPEC_TLS); + reg = load_tls_operand (sum, reg); + emit_insn (gen_addsi3 (reg, reg, gen_rtx_REG (Pmode, FDPIC_REGNUM))); + emit_move_insn (reg, gen_rtx_MEM (Pmode, reg)); + } else { - emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno)); - emit_move_insn (reg, gen_const_mem (SImode, reg)); + labelno = GEN_INT (pic_labelno++); + label = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL); + label = gen_rtx_CONST (VOIDmode, label); + sum = gen_rtx_UNSPEC (Pmode, + gen_rtvec (4, x, GEN_INT (TLS_IE32), label, + GEN_INT (TARGET_ARM ? 8 : 4)), + UNSPEC_TLS); + reg = load_tls_operand (sum, reg); + + if (TARGET_ARM) + emit_insn (gen_tls_load_dot_plus_eight (reg, reg, labelno)); + else if (TARGET_THUMB2) + emit_insn (gen_tls_load_dot_plus_four (reg, NULL, reg, labelno)); + else + { + emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno)); + emit_move_insn (reg, gen_const_mem (SImode, reg)); + } } tp = arm_load_tp (NULL_RTX); @@ -28158,15 +28195,24 @@ arm_emit_tls_decoration (FILE *fp, rtx x) case TLS_GD32: fputs ("(tlsgd)", fp); break; + case TLS_GD32_FDPIC: + fputs ("(tlsgd_fdpic)", fp); + break; case TLS_LDM32: fputs ("(tlsldm)", fp); break; + case TLS_LDM32_FDPIC: + fputs ("(tlsldm_fdpic)", fp); + break; case TLS_LDO32: fputs ("(tlsldo)", fp); break; case TLS_IE32: fputs ("(gottpoff)", fp); break; + case TLS_IE32_FDPIC: + fputs ("(gottpoff_fdpic)", fp); + break; case TLS_LE32: fputs ("(tpoff)", fp); break; -- 2.6.3 |
[ARM/FDPIC v6 11/24] [ARM] FDPIC: Add support to unwind FDPIC signal frame
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> libgcc/ * unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN) (THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC) (FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER) (FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT) (ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0, FDPIC_T2_LDR_R12_WITH_FUNCDESC) (FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New. (__gnu_personality_sigframe_fdpic): New. (get_eit_entry): Add FDPIC signal frame support. Change-Id: I7f9527cc50665dd1a731b7badf71c319fb38bf57 diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc index 0bacc11..c9a82b7 100644 --- a/libgcc/unwind-arm-common.inc +++ b/libgcc/unwind-arm-common.inc @@ -30,6 +30,26 @@ #include <sys/sdt.h> #endif +#if __FDPIC__ +/* Load r7 with rt_sigreturn value. */ +#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad /* mov r7, #0xad */ +#define THUMB2_SET_R7_RT_SIGRETURN 0x07adf04f /* mov.w r7, #0xad */ + +/* FDPIC jump to restorer sequence. */ +#define FDPIC_LDR_R12_WITH_FUNCDESC 0xe59fc004 /* ldr r12, [pc, #4] */ +#define FDPIC_LDR_R9_WITH_GOT 0xe59c9004 /* ldr r9, [r12, #4] */ +#define FDPIC_LDR_PC_WITH_RESTORER 0xe59cf000 /* ldr pc, [r12] */ +#define FDPIC_T2_LDR_R12_WITH_FUNCDESC 0xc008f8df /* ldr.w r12, [pc, #8] */ +#define FDPIC_T2_LDR_R9_WITH_GOT 0x9004f8dc /* ldr.w r9, [r12, #4] */ +#define FDPIC_T2_LDR_PC_WITH_RESTORER 0xf000f8dc /* ldr.w pc, [r12] */ +#define FDPIC_FUNCDESC_OFFSET 12 + +/* Signal frame offsets. */ +#define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80 +#define ARM_UCONTEXT_SIGCONTEXT 0x14 +#define ARM_SIGCONTEXT_R0 0xc +#endif + /* We add a prototype for abort here to avoid creating a dependency on target headers. */ extern void abort (void); @@ -199,6 +219,45 @@ search_EIT_table (const __EIT_entry * table, int nrec, _uw return_address) } } +#if __FDPIC__ +/* VFP is not restored, but this is sufficient to allow unwinding. */ +static _Unwind_Reason_Code +__gnu_personality_sigframe_fdpic (_Unwind_State state, + _Unwind_Control_Block *ucbp, + _Unwind_Context *context) +{ + unsigned int sp; + unsigned int pc; + unsigned int funcdesc; + unsigned int handler; + unsigned int first_handler_instruction; + int i; + + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); + _Unwind_VRS_Get (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &pc); + + funcdesc = *(unsigned int *)((pc & ~1) + FDPIC_FUNCDESC_OFFSET); + handler = *(unsigned int *)(funcdesc); + first_handler_instruction = *(unsigned int *)(handler & ~1); + + /* Adjust SP to point to the start of registers according to + signal type. */ + if (first_handler_instruction == ARM_SET_R7_RT_SIGRETURN + || first_handler_instruction == THUMB2_SET_R7_RT_SIGRETURN) + sp += ARM_NEW_RT_SIGFRAME_UCONTEXT + + ARM_UCONTEXT_SIGCONTEXT + + ARM_SIGCONTEXT_R0; + else + sp += ARM_UCONTEXT_SIGCONTEXT + + ARM_SIGCONTEXT_R0; + /* Restore regs saved on stack by the kernel. */ + for (i = 0; i < 16; i++) + _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, sp + 4 * i); + + return _URC_CONTINUE_UNWIND; +} +#endif + /* Find the exception index table eintry for the given address. Fill in the relevant fields of the UCB. Returns _URC_FAILURE if an error occurred, _URC_OK on success. */ @@ -222,6 +281,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) &nrec); if (!eitp) { +#if __FDPIC__ + /* If we are unwinding a signal handler then perhaps we have + reached a trampoline. Try to detect jump to restorer + sequence. */ + _uw *pc = (_uw *)((return_address+2) & ~1); + if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_LDR_R9_WITH_GOT + && pc[2] == FDPIC_LDR_PC_WITH_RESTORER) + || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT + && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER)) + { + struct funcdesc_t *funcdesc + = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic; + + UCB_PR_ADDR (ucbp) = funcdesc->ptr; + UCB_PR_GOT (ucbp) = funcdesc->got; + + return _URC_OK; + } +#endif UCB_PR_ADDR (ucbp) = 0; return _URC_FAILURE; } @@ -236,6 +316,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) if (!eitp) { +#if __FDPIC__ + /* If we are unwinding a signal handler then perhaps we have + reached a trampoline. Try to detect jump to restorer + sequence. */ + _uw *pc = (_uw *)((return_address+2) & ~1); + if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_LDR_R9_WITH_GOT + && pc[2] == FDPIC_LDR_PC_WITH_RESTORER) + || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT + && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER)) + { + struct funcdesc_t *funcdesc + = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic; + + UCB_PR_ADDR (ucbp) = funcdesc->ptr; + UCB_PR_GOT (ucbp) = funcdesc->got; + + return _URC_OK; + } +#endif UCB_PR_ADDR (ucbp) = 0; return _URC_FAILURE; } @@ -244,6 +345,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) /* Can this frame be unwound at all? */ if (eitp->content == EXIDX_CANTUNWIND) { +#if __FDPIC__ + /* If we are unwinding a signal handler then perhaps we have + reached a trampoline. Try to detect jump to restorer + sequence. */ + _uw *pc = (_uw *)((return_address+2) & ~1); + if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_LDR_R9_WITH_GOT + && pc[2] == FDPIC_LDR_PC_WITH_RESTORER) + || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT + && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER)) + { + struct funcdesc_t *funcdesc + = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic; + + UCB_PR_ADDR (ucbp) = funcdesc->ptr; + UCB_PR_GOT (ucbp) = funcdesc->got; + + return _URC_OK; + } +#endif UCB_PR_ADDR (ucbp) = 0; return _URC_END_OF_STACK; } -- 2.6.3 |
[ARM/FDPIC v6 12/24] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
We call __aeabi_read_tp() to get the thread pointer. Since this is a function call, we have to restore the FDPIC register afterwards. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/ * config/arm/arm.c (arm_load_tp): Add FDPIC support. * config/arm/arm.md (FDPIC_REGNUM): New constant. (load_tp_soft_fdpic): New pattern. (load_tp_soft): Disable in FDPIC mode. Change-Id: I0811cc7c5df8f44dd8b8b1f4caf54c7d3609c414 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 5f1d2d4..c452771 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -8685,7 +8685,18 @@ arm_load_tp (rtx target) rtx tmp; - emit_insn (gen_load_tp_soft ()); + if (TARGET_FDPIC) + { + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM); + + emit_insn (gen_load_tp_soft_fdpic ()); + + /* Restore r9. */ + emit_insn (gen_restore_pic_register_after_call(fdpic_reg, initial_fdpic_reg)); + } + else + emit_insn (gen_load_tp_soft ()); tmp = gen_rtx_REG (SImode, R0_REGNUM); emit_move_insn (target, tmp); diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 027febb..918271d 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -31,6 +31,7 @@ [(R0_REGNUM 0) ; First CORE register (R1_REGNUM 1) ; Second CORE register (R4_REGNUM 4) ; Fifth CORE register + (FDPIC_REGNUM 9) ; FDPIC register (IP_REGNUM 12) ; Scratch register (SP_REGNUM 13) ; Stack pointer (LR_REGNUM 14) ; Return address register @@ -11165,12 +11166,25 @@ ) ;; Doesn't clobber R1-R3. Must use r0 for the first operand. +(define_insn "load_tp_soft_fdpic" + [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) + (clobber (reg:SI FDPIC_REGNUM)) + (clobber (reg:SI LR_REGNUM)) + (clobber (reg:SI IP_REGNUM)) + (clobber (reg:CC CC_REGNUM))] + "TARGET_SOFT_TP && TARGET_FDPIC" + "bl\\t__aeabi_read_tp\\t@ load_tp_soft" + [(set_attr "conds" "clob") + (set_attr "type" "branch")] +) + +;; Doesn't clobber R1-R3. Must use r0 for the first operand. (define_insn "load_tp_soft" [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) (clobber (reg:SI LR_REGNUM)) (clobber (reg:SI IP_REGNUM)) (clobber (reg:CC CC_REGNUM))] - "TARGET_SOFT_TP" + "TARGET_SOFT_TP && !TARGET_FDPIC" "bl\\t__aeabi_read_tp\\t@ load_tp_soft" [(set_attr "conds" "clob") (set_attr "type" "branch")] -- 2.6.3 |
[ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
Without this, when we are unwinding across a signal frame we can jump to an even address which leads to an exception. This is needed in __gnu_persnality_sigframe_fdpic() when restoring the PC from the signal frame since the PC saved by the kernel has the LSB bit set to zero. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> libgcc/ * config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only architecture. Change-Id: Ie84de548226bcf1751e19a09e8f091fb3013ccea diff --git a/libgcc/config/arm/unwind-arm.c b/libgcc/config/arm/unwind-arm.c index 9ba73e7..8313ee0 100644 --- a/libgcc/config/arm/unwind-arm.c +++ b/libgcc/config/arm/unwind-arm.c @@ -199,6 +199,11 @@ _Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context, return _UVRSR_FAILED; vrs->core.r[regno] = *(_uw *) valuep; +#if defined(__thumb__) + /* Force LSB bit since we always run thumb code. */ + if (regno == R_PC) + vrs->core.r[regno] |= 1; +#endif return _UVRSR_OK; case _UVRSC_VFP: -- 2.6.3 |
[ARM/FDPIC v6 14/24] [ARM][testsuite] FDPIC: Skip unsupported tests
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
Several tests cannot work on ARM-FDPIC for various reasons: skip them, or skip some directives. gcc.dg/20020312-2.c: Skip since it forces -fno-pic. gcc.target/arm/: * Skip since r9 is clobbered by assembly code: 20051215-1.c mmx-1.c pr61948.c pr77933-1.c pr77933-2.c * Skip since the test forces armv5te which is not supported by FDPIC: pr40887.c pr19599.c * Skip since FDPIC disables sibcall to external functions: sibcall-1.c tail-long-call vfp-longcall-apcs * Skip size check since it's different for FDPIC: ivopts-2.c ivopts-3.c ivopts-4.c ivopts-5.c pr43597.c pr43920-2.c * Disable assembler scanning invalid for FDPIC: pr45701-1.c pr45701-2.c stack-red-zone.c * gnu2 TLS dialect is not supported by FDPIC: tlscall.c * Test relies on symbols not generated in FDPIC: data-rel-2.c data-rel-3.c 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> gcc/testsuite/ * gcc.dg/20020312-2.c: Skip on arm*-*-uclinuxfdpiceabi. * gcc.target/arm/20051215-1.c: Likewise. * gcc.target/arm/mmx-1.c: Likewise. * gcc.target/arm/pr19599.c: Likewise. * gcc.target/arm/pr40887.c: Likewise. * gcc.target/arm/pr61948.c: Likewise. * gcc.target/arm/pr77933-1.c: Likewise. * gcc.target/arm/pr77933-2.c: Likewise. * gcc.target/arm/sibcall-1.c: Likewise. * gcc.target/arm/data-rel-2.c: Likewise. * gcc.target/arm/data-rel-3.c: Likewise. * gcc.target/arm/tail-long-call: Likewise. * gcc.target/arm/tlscall.c: Likewise. * gcc.target/arm/vfp-longcall-apcs: Likewise. * gcc.target/arm/ivopts-2.c: Skip object-size test on arm*-*-uclinuxfdpiceabi. * gcc.target/arm/ivopts-3.c: Likewise. * gcc.target/arm/ivopts-4.c: Likewise. * gcc.target/arm/ivopts-5.c: Likewise. * gcc.target/arm/pr43597.c: Likewise. * gcc.target/arm/pr43920-2.c: Likewise. * gcc.target/arm/pr45701-1.c: Skip scan-assembler on arm*-*-uclinuxfdpiceabi. * gcc.target/arm/pr45701-2.c: Likewise. * gcc.target/arm/stack-red-zone.c: Likewise. Change-Id: Icada7ce52537901fdac10403e7997571b7e2c509 diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c index 98af0d4..52c33d0 100644 --- a/gcc/testsuite/gcc.dg/20020312-2.c +++ b/gcc/testsuite/gcc.dg/20020312-2.c @@ -9,6 +9,7 @@ /* { dg-options "-O -fno-pic" } */ /* { dg-additional-options "-no-pie" { target pie_enabled } } */ /* { dg-require-effective-target nonlocal_goto } */ +/* { dg-skip-if "" { arm*-*-uclinuxfdpiceabi } "*" "" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.target/arm/20051215-1.c b/gcc/testsuite/gcc.target/arm/20051215-1.c index 0519dc7..cc07693 100644 --- a/gcc/testsuite/gcc.target/arm/20051215-1.c +++ b/gcc/testsuite/gcc.target/arm/20051215-1.c @@ -3,6 +3,7 @@ the call would need an output reload. */ /* { dg-do run } */ /* { dg-options "-O2 -fno-omit-frame-pointer" } */ +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */ extern void abort (void); typedef void (*callback) (void); diff --git a/gcc/testsuite/gcc.target/arm/data-rel-2.c b/gcc/testsuite/gcc.target/arm/data-rel-2.c index 6ba47d6..7d37a8c 100644 --- a/gcc/testsuite/gcc.target/arm/data-rel-2.c +++ b/gcc/testsuite/gcc.target/arm/data-rel-2.c @@ -1,3 +1,4 @@ +/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-options "-fPIC -mno-pic-data-is-text-relative -mno-single-pic-base" } */ /* { dg-final { scan-assembler-not "j-\\(.LPIC" } } */ /* { dg-final { scan-assembler "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */ diff --git a/gcc/testsuite/gcc.target/arm/data-rel-3.c b/gcc/testsuite/gcc.target/arm/data-rel-3.c index 2ce1e66..534c6c4 100644 --- a/gcc/testsuite/gcc.target/arm/data-rel-3.c +++ b/gcc/testsuite/gcc.target/arm/data-rel-3.c @@ -1,3 +1,4 @@ +/* { dg-skip-if "Not supported in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-options "-fPIC -mpic-data-is-text-relative" } */ /* { dg-final { scan-assembler "j-\\(.LPIC" } } */ /* { dg-final { scan-assembler-not "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */ diff --git a/gcc/testsuite/gcc.target/arm/ivopts-2.c b/gcc/testsuite/gcc.target/arm/ivopts-2.c index afe91aa..f1d5edb 100644 --- a/gcc/testsuite/gcc.target/arm/ivopts-2.c +++ b/gcc/testsuite/gcc.target/arm/ivopts-2.c @@ -14,4 +14,4 @@ tr4 (short array[], int n) /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */ /* { dg-final { scan-tree-dump-times "PHI <" 1 "ivopts"} } */ -/* { dg-final { object-size text <= 26 { target arm_thumb2 } } } */ +/* { dg-final { object-size text <= 26 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */ diff --git a/gcc/testsuite/gcc.target/arm/ivopts-3.c b/gcc/testsuite/gcc.target/arm/ivopts-3.c index faea996..357350c 100644 --- a/gcc/testsuite/gcc.target/arm/ivopts-3.c +++ b/gcc/testsuite/gcc.target/arm/ivopts-3.c @@ -16,4 +16,4 @@ tr3 (short array[], unsigned int n) /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */ /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */ /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */ -/* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */ +/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */ diff --git a/gcc/testsuite/gcc.target/arm/ivopts-4.c b/gcc/testsuite/gcc.target/arm/ivopts-4.c index b8101cb..2e866c0 100644 --- a/gcc/testsuite/gcc.target/arm/ivopts-4.c +++ b/gcc/testsuite/gcc.target/arm/ivopts-4.c @@ -17,4 +17,4 @@ tr2 (int array[], int n) /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */ /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */ /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */ -/* { dg-final { object-size text <= 36 { target arm_thumb2 } } } */ +/* { dg-final { object-size text <= 36 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */ diff --git a/gcc/testsuite/gcc.target/arm/ivopts-5.c b/gcc/testsuite/gcc.target/arm/ivopts-5.c index f4f8c2c..4e8e380 100644 --- a/gcc/testsuite/gcc.target/arm/ivopts-5.c +++ b/gcc/testsuite/gcc.target/arm/ivopts-5.c @@ -16,4 +16,4 @@ tr1 (int array[], unsigned int n) /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */ /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */ /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */ -/* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */ +/* { dg-final { object-size text <= 30 { target { arm_thumb2 && { ! arm*-*-uclinuxfdpiceabi } } } } } */ diff --git a/gcc/testsuite/gcc.target/arm/mmx-1.c b/gcc/testsuite/gcc.target/arm/mmx-1.c index 6317cc0..8060dbd 100644 --- a/gcc/testsuite/gcc.target/arm/mmx-1.c +++ b/gcc/testsuite/gcc.target/arm/mmx-1.c @@ -9,6 +9,7 @@ /* { dg-require-effective-target arm32 } */ /* { dg-require-effective-target arm_iwmmxt_ok } */ /* { dg-final { scan-assembler "push.*ip,\[ ]*pc" } } */ +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* This function uses all the call-saved registers, namely r4, r5, r6, r7, r8, r9, sl, fp. Since we also save lr, that leaves an odd diff --git a/gcc/testsuite/gcc.target/arm/pr19599.c b/gcc/testsuite/gcc.target/arm/pr19599.c index c3ee220..a536548 100644 --- a/gcc/testsuite/gcc.target/arm/pr19599.c +++ b/gcc/testsuite/gcc.target/arm/pr19599.c @@ -1,4 +1,5 @@ /* { dg-skip-if "need at least armv5te" { *-*-* } { "-march=armv[234]*" "-mthumb" } { "" } } */ +/* { dg-skip-if "FDPIC does not support armv5te" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-options "-O2 -march=armv5te -marm" } */ /* { dg-final { scan-assembler "bx" } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr40887.c b/gcc/testsuite/gcc.target/arm/pr40887.c index 8c91cd9..832f676 100644 --- a/gcc/testsuite/gcc.target/arm/pr40887.c +++ b/gcc/testsuite/gcc.target/arm/pr40887.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-skip-if "need at least armv5" { *-*-* } { "-march=armv[234]*" } { "" } } */ +/* { dg-skip-if "FDPIC does not support armv5te" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v5te_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v5te } */ diff --git a/gcc/testsuite/gcc.target/arm/pr43597.c b/gcc/testsuite/gcc.target/arm/pr43597.c index 3fdea98..6c9d419 100644 --- a/gcc/testsuite/gcc.target/arm/pr43597.c +++ b/gcc/testsuite/gcc.target/arm/pr43597.c @@ -24,4 +24,4 @@ foo4 () /* { dg-final { scan-assembler-times "sub" 1 } } */ /* { dg-final { scan-assembler-times "cmp" 0 } } */ -/* { dg-final { object-size text <= 30 } } */ +/* { dg-final { object-size text <= 30 { target { ! arm*-*-uclinuxfdpiceabi } } } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr43920-2.c b/gcc/testsuite/gcc.target/arm/pr43920-2.c index f5e8f48..c367d6b 100644 --- a/gcc/testsuite/gcc.target/arm/pr43920-2.c +++ b/gcc/testsuite/gcc.target/arm/pr43920-2.c @@ -29,4 +29,4 @@ int getFileStartAndLength (int fd, int *start_, size_t *length_) /* { dg-final { scan-assembler-times "pop" 2 } } */ /* { dg-final { scan-assembler-times "beq" 3 } } */ -/* { dg-final { object-size text <= 54 } } */ +/* { dg-final { object-size text <= 54 { target { ! arm*-*-uclinuxfdpiceabi } } } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr45701-1.c b/gcc/testsuite/gcc.target/arm/pr45701-1.c index 01db15a..b26011b 100644 --- a/gcc/testsuite/gcc.target/arm/pr45701-1.c +++ b/gcc/testsuite/gcc.target/arm/pr45701-1.c @@ -1,8 +1,8 @@ /* { dg-do compile } */ /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-options "-mthumb -Os" } */ -/* { dg-final { scan-assembler "push\t\{r3" } } */ -/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */ +/* { dg-final { scan-assembler "push\t\{r3" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ +/* { dg-final { scan-assembler-not "\[^\-\]r8" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ extern int hist_verify; extern int a1; diff --git a/gcc/testsuite/gcc.target/arm/pr45701-2.c b/gcc/testsuite/gcc.target/arm/pr45701-2.c index ce66d75..32eed4d 100644 --- a/gcc/testsuite/gcc.target/arm/pr45701-2.c +++ b/gcc/testsuite/gcc.target/arm/pr45701-2.c @@ -1,8 +1,8 @@ /* { dg-do compile } */ /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-options "-mthumb -Os" } */ -/* { dg-final { scan-assembler "push\t\{r3" } } */ -/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */ +/* { dg-final { scan-assembler "push\t\{r3" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ +/* { dg-final { scan-assembler-not "\[^\-\]r8" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ extern int hist_verify; extern int a1; diff --git a/gcc/testsuite/gcc.target/arm/pr61948.c b/gcc/testsuite/gcc.target/arm/pr61948.c index 411e898..3b2b72a 100644 --- a/gcc/testsuite/gcc.target/arm/pr61948.c +++ b/gcc/testsuite/gcc.target/arm/pr61948.c @@ -1,5 +1,6 @@ /* PR target/61948 */ /* { dg-do compile } */ +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_neon_ok } */ /* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-options "-O2 -mthumb" } */ diff --git a/gcc/testsuite/gcc.target/arm/pr77933-1.c b/gcc/testsuite/gcc.target/arm/pr77933-1.c index 95cf68e..86b9507 100644 --- a/gcc/testsuite/gcc.target/arm/pr77933-1.c +++ b/gcc/testsuite/gcc.target/arm/pr77933-1.c @@ -1,4 +1,5 @@ /* { dg-do run } */ +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-options "-O2" } */ __attribute__ ((noinline, noclone)) void diff --git a/gcc/testsuite/gcc.target/arm/pr77933-2.c b/gcc/testsuite/gcc.target/arm/pr77933-2.c index 9028c4f..a06c11a 100644 --- a/gcc/testsuite/gcc.target/arm/pr77933-2.c +++ b/gcc/testsuite/gcc.target/arm/pr77933-2.c @@ -1,5 +1,6 @@ /* { dg-do run } */ /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ +/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-options "-mthumb -O2 -mtpcs-leaf-frame" } */ __attribute__ ((noinline, noclone)) void diff --git a/gcc/testsuite/gcc.target/arm/sibcall-1.c b/gcc/testsuite/gcc.target/arm/sibcall-1.c index cf352c1..dcdd552 100644 --- a/gcc/testsuite/gcc.target/arm/sibcall-1.c +++ b/gcc/testsuite/gcc.target/arm/sibcall-1.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { arm32 } } } */ /* { dg-options "-O2" } */ +/* { dg-skip-if "FDPIC does not support sibcall optimization" { arm*-*-uclinuxfdpiceabi } "*" "" } */ #define noinline __attribute__((noinline)) diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c b/gcc/testsuite/gcc.target/arm/stack-red-zone.c index b29ed0b..3385d7d 100644 --- a/gcc/testsuite/gcc.target/arm/stack-red-zone.c +++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c @@ -1,7 +1,7 @@ /* No stack red zone. PR38644. */ /* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-options "-mthumb -O2" } */ -/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */ +/* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ extern int doStreamReadBlock (int *, char *, int size, int); diff --git a/gcc/testsuite/gcc.target/arm/tail-long-call.c b/gcc/testsuite/gcc.target/arm/tail-long-call.c index 9b27468..f70e9cf 100644 --- a/gcc/testsuite/gcc.target/arm/tail-long-call.c +++ b/gcc/testsuite/gcc.target/arm/tail-long-call.c @@ -1,4 +1,5 @@ /* { dg-skip-if "need at least armv5te" { *-*-* } { "-march=armv[234]*" "-mthumb" } { "" } } */ +/* { dg-skip-if "FDPIC does not support tailcall optimization" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-options "-O2 -march=armv5te -marm" } */ /* { dg-final { scan-assembler "bx" } } */ /* { dg-final { scan-assembler-not "blx" } } */ diff --git a/gcc/testsuite/gcc.target/arm/tlscall.c b/gcc/testsuite/gcc.target/arm/tlscall.c index 366c1ae..5f4d58b 100644 --- a/gcc/testsuite/gcc.target/arm/tlscall.c +++ b/gcc/testsuite/gcc.target/arm/tlscall.c @@ -2,6 +2,7 @@ /* { dg-do assemble } */ /* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */ +/* { dg-skip-if "FDPIC does not support gnu2 TLS dialect" { arm*-*-uclinuxfdpiceabi } "*" "" } */ typedef struct _IO_FILE FILE; diff --git a/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c b/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c index fa22b4d..817d5d0 100644 --- a/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c +++ b/gcc/testsuite/gcc.target/arm/vfp-longcall-apcs.c @@ -1,4 +1,5 @@ /* { dg-do run } */ +/* { dg-skip-if "FDPIC does not support sibcall optimization" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-options "-mapcs-frame -O -foptimize-sibling-calls -ffunction-sections" } */ extern void abort (void); -- 2.6.3 |
[ARM/FDPIC v6 15/24] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns.
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
In FDPIC mode, r9 is saved in addition to other registers, so update the expected patterns accordingly. 2019-XX-XX Christophe Lyon <[hidden email]> Mickaël Guêné <[hidden email]> * gcc/testsuite/ * gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for arm*-*-uclinuxfdpiceabi. * gcc.target/arm/interrupt-2.c: Likewise. * gcc.target/arm/pr70830.c: Likewise. Change-Id: Id946b79bacc32be585c31e60a355191f104cc29e diff --git a/gcc/testsuite/gcc.target/arm/interrupt-1.c b/gcc/testsuite/gcc.target/arm/interrupt-1.c index fe94877..493763d 100644 --- a/gcc/testsuite/gcc.target/arm/interrupt-1.c +++ b/gcc/testsuite/gcc.target/arm/interrupt-1.c @@ -13,5 +13,7 @@ void foo () bar (0); } -/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" } } */ -/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" } } */ +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r9, fp, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r9, fp, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */ diff --git a/gcc/testsuite/gcc.target/arm/interrupt-2.c b/gcc/testsuite/gcc.target/arm/interrupt-2.c index 289eca0..5be1f16 100644 --- a/gcc/testsuite/gcc.target/arm/interrupt-2.c +++ b/gcc/testsuite/gcc.target/arm/interrupt-2.c @@ -15,5 +15,7 @@ void test() foo = 0; } -/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" } } */ -/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" } } */ +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ +/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, r6, r9, ip, lr}" { target arm*-*-uclinuxfdpiceabi } } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, r6, r9, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr70830.c b/gcc/testsuite/gcc.target/arm/pr70830.c index cad903b..cd84c42 100644 --- a/gcc/testsuite/gcc.target/arm/pr70830.c +++ b/gcc/testsuite/gcc.target/arm/pr70830.c @@ -11,4 +11,5 @@ void __attribute__ ((interrupt ("IRQ"))) dm3730_IRQHandler(void) { prints("IRQ" ); } -/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" { target { ! arm*-*-uclinuxfdpiceabi } } } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r9, ip, pc}\\^" { target arm*-*-uclinuxfdpiceabi } } } */ -- 2.6.3 |
[ARM/FDPIC v6 16/24] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
Some tests fail on arm*-*-uclinuxfdpiceabi because it generates PIC code and they don't support it: skip them. They also fail on arm*-linux* when forcing -fPIC. 2019-XX-XX Christophe Lyon <[hidden email]> gcc/testsuite/ * gcc.target/arm/eliminate.c: Accept only nonpic targets. * g++.dg/other/anon5.C: Likewise. Change-Id: I8efb8d356ce25b020c44a84b07f79a996dca0358 diff --git a/gcc/testsuite/g++.dg/other/anon5.C b/gcc/testsuite/g++.dg/other/anon5.C index ee4601e..dadd92e 100644 --- a/gcc/testsuite/g++.dg/other/anon5.C +++ b/gcc/testsuite/g++.dg/other/anon5.C @@ -1,5 +1,6 @@ // PR c++/34094 // { dg-do link { target { ! { *-*-darwin* *-*-hpux* *-*-solaris2.* } } } } +// { dg-require-effective-target nonpic } // { dg-options "-gdwarf-2" } // Ignore additional message on powerpc-ibm-aix // { dg-prune-output "obtain more information" } */ diff --git a/gcc/testsuite/gcc.target/arm/eliminate.c b/gcc/testsuite/gcc.target/arm/eliminate.c index f254dd8..299d4df 100644 --- a/gcc/testsuite/gcc.target/arm/eliminate.c +++ b/gcc/testsuite/gcc.target/arm/eliminate.c @@ -1,4 +1,4 @@ -/* { dg-do compile } */ +/* { dg-do compile { target { nonpic } } } */ /* { dg-options "-O2" } */ struct X -- 2.6.3 |
[ARM/FDPIC v6 17/24] [ARM][testsuite] FDPIC: Handle *-*-uclinux*
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
Add *-*-uclinux* to tests that work on this target. 2019-XX-XX Christophe Lyon <[hidden email]> gcc/testsuite/ * g++.dg/abi/forced.C: Add *-*-uclinux*. * g++.dg/abi/guard2.C: Likewise. * g++.dg/ext/cleanup-10.C: Likewise. * g++.dg/ext/cleanup-11.C: Likewise. * g++.dg/ext/cleanup-8.C: Likewise. * g++.dg/ext/cleanup-9.C: Likewise. * g++.dg/ext/sync-4.C: Likewise. * g++.dg/ipa/comdat.C: Likewise. * gcc.dg/20041106-1.c: Likewise. * gcc.dg/cleanup-10.c: Likewise. * gcc.dg/cleanup-11.c: Likewise. * gcc.dg/cleanup-8.c: Likewise. * gcc.dg/cleanup-9.c: Likewise. * gcc.dg/fdata-sections-1.c: Likewise. * gcc.dg/fdata-sections-2.c: Likewise. * gcc.dg/pr39323-1.c: Likewise. * gcc.dg/pr39323-2.c: Likewise. * gcc.dg/pr39323-3.c: Likewise. * gcc.dg/pr65780-1.c: Likewise. * gcc.dg/pr65780-2.c: Likewise. * gcc.dg/pr67338.c: Likewise. * gcc.dg/pr78185.c: Likewise. * gcc.dg/pr83100-1.c: Likewise. * gcc.dg/pr83100-4.c: Likewise. * gcc.dg/strlenopt-12g.c: Likewise. * gcc.dg/strlenopt-14g.c: Likewise. * gcc.dg/strlenopt-14gf.c: Likewise. * gcc.dg/strlenopt-16g.c: Likewise. * gcc.dg/strlenopt-17g.c: Likewise. * gcc.dg/strlenopt-18g.c: Likewise. * gcc.dg/strlenopt-1f.c: Likewise. * gcc.dg/strlenopt-22g.c: Likewise. * gcc.dg/strlenopt-2f.c: Likewise. * gcc.dg/strlenopt-31g.c: Likewise. * gcc.dg/strlenopt-33g.c: Likewise. * gcc.dg/strlenopt-4g.c: Likewise. * gcc.dg/strlenopt-4gf.c: Likewise. * gcc.dg/strncmp-2.c: Likewise. * gcc.dg/struct-ret-3.c: Likewise. * gcc.dg/torture/pr69760.c: Likewise. * gcc.target/arm/div64-unwinding.c: Likewise. * gcc.target/arm/stack-checking.c: Likewise. * gcc.target/arm/synchronize.c: Likewise. * gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi. * lib/target-supports.exp (check_effective_target_pie): Likewise. (check_effective_target_sync_long_long_runtime): Likewise. (check_effective_target_sync_int_long): Likewise. (check_effective_target_sync_char_short): Likewise. Change-Id: I89bfea79d4490c5df0b6470def5a31d7f31ac2cc diff --git a/gcc/testsuite/g++.dg/abi/forced.C b/gcc/testsuite/g++.dg/abi/forced.C index 0e6be28..2d1ec53 100644 --- a/gcc/testsuite/g++.dg/abi/forced.C +++ b/gcc/testsuite/g++.dg/abi/forced.C @@ -1,4 +1,4 @@ -// { dg-do run { target *-*-linux* *-*-gnu* } } +// { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } // { dg-options "-pthread" } #include <pthread.h> diff --git a/gcc/testsuite/g++.dg/abi/guard2.C b/gcc/testsuite/g++.dg/abi/guard2.C index c35fa7e..74139a8 100644 --- a/gcc/testsuite/g++.dg/abi/guard2.C +++ b/gcc/testsuite/g++.dg/abi/guard2.C @@ -1,6 +1,6 @@ // PR c++/41611 // Test that the guard gets its own COMDAT group. -// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* *-*-gnu* } } } +// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* *-*-gnu* *-*-uclinux* } } } struct A { static int f() diff --git a/gcc/testsuite/g++.dg/ext/cleanup-10.C b/gcc/testsuite/g++.dg/ext/cleanup-10.C index 66c7b76..56aeb66 100644 --- a/gcc/testsuite/g++.dg/ext/cleanup-10.C +++ b/gcc/testsuite/g++.dg/ext/cleanup-10.C @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through signal frames on alternate stack. */ diff --git a/gcc/testsuite/g++.dg/ext/cleanup-11.C b/gcc/testsuite/g++.dg/ext/cleanup-11.C index 6e96521..c6d3560 100644 --- a/gcc/testsuite/g++.dg/ext/cleanup-11.C +++ b/gcc/testsuite/g++.dg/ext/cleanup-11.C @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through realtime signal frames on alternate stack. */ diff --git a/gcc/testsuite/g++.dg/ext/cleanup-8.C b/gcc/testsuite/g++.dg/ext/cleanup-8.C index ccf9bef..e99508d 100644 --- a/gcc/testsuite/g++.dg/ext/cleanup-8.C +++ b/gcc/testsuite/g++.dg/ext/cleanup-8.C @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through signal frames. */ diff --git a/gcc/testsuite/g++.dg/ext/cleanup-9.C b/gcc/testsuite/g++.dg/ext/cleanup-9.C index dcdfcae..45e5f90 100644 --- a/gcc/testsuite/g++.dg/ext/cleanup-9.C +++ b/gcc/testsuite/g++.dg/ext/cleanup-9.C @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* Verify that cleanups work with exception handling through realtime signal frames. */ diff --git a/gcc/testsuite/g++.dg/ext/sync-4.C b/gcc/testsuite/g++.dg/ext/sync-4.C index 8a2de48..029afb0 100644 --- a/gcc/testsuite/g++.dg/ext/sync-4.C +++ b/gcc/testsuite/g++.dg/ext/sync-4.C @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* FIXME The following additional option should be removed after the fix for radr://19802258. /* { dg-xfail-run-if "PR60563 radr://19802258" { *-*-darwin* } } */ /* { dg-require-effective-target sync_long_long_runtime } */ diff --git a/gcc/testsuite/g++.dg/ipa/comdat.C b/gcc/testsuite/g++.dg/ipa/comdat.C index 1945e32..f3df99a 100644 --- a/gcc/testsuite/g++.dg/ipa/comdat.C +++ b/gcc/testsuite/g++.dg/ipa/comdat.C @@ -1,4 +1,4 @@ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-ipa-comdats" } */ #include <stdio.h> __attribute__ ((noinline)) diff --git a/gcc/testsuite/gcc.dg/20041106-1.c b/gcc/testsuite/gcc.dg/20041106-1.c index cba4a06..95579ff 100644 --- a/gcc/testsuite/gcc.dg/20041106-1.c +++ b/gcc/testsuite/gcc.dg/20041106-1.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-solaris* *-*-uclinux* } } */ /* { dg-options -O2 } */ #include <sys/types.h> diff --git a/gcc/testsuite/gcc.dg/cleanup-10.c b/gcc/testsuite/gcc.dg/cleanup-10.c index 1af63ea..9fc8658 100644 --- a/gcc/testsuite/gcc.dg/cleanup-10.c +++ b/gcc/testsuite/gcc.dg/cleanup-10.c @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* { dg-require-effective-target exceptions } */ /* Verify that cleanups work with exception handling through signal frames diff --git a/gcc/testsuite/gcc.dg/cleanup-11.c b/gcc/testsuite/gcc.dg/cleanup-11.c index c1f19fe..6b499d4 100644 --- a/gcc/testsuite/gcc.dg/cleanup-11.c +++ b/gcc/testsuite/gcc.dg/cleanup-11.c @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* { dg-require-effective-target exceptions } */ /* Verify that cleanups work with exception handling through realtime signal diff --git a/gcc/testsuite/gcc.dg/cleanup-8.c b/gcc/testsuite/gcc.dg/cleanup-8.c index 45abdb2..87f4186 100644 --- a/gcc/testsuite/gcc.dg/cleanup-8.c +++ b/gcc/testsuite/gcc.dg/cleanup-8.c @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* { dg-require-effective-target exceptions } */ /* Verify that cleanups work with exception handling through signal diff --git a/gcc/testsuite/gcc.dg/cleanup-9.c b/gcc/testsuite/gcc.dg/cleanup-9.c index 98dc268..d34ce12 100644 --- a/gcc/testsuite/gcc.dg/cleanup-9.c +++ b/gcc/testsuite/gcc.dg/cleanup-9.c @@ -1,4 +1,4 @@ -/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* } } */ +/* { dg-do run { target hppa*-*-hpux* *-*-linux* *-*-gnu* powerpc*-*-darwin* *-*-darwin[912]* *-*-uclinux* } } */ /* { dg-options "-fexceptions -fnon-call-exceptions -O2" } */ /* { dg-require-effective-target exceptions } */ /* Verify that cleanups work with exception handling through realtime diff --git a/gcc/testsuite/gcc.dg/fdata-sections-1.c b/gcc/testsuite/gcc.dg/fdata-sections-1.c index 51686b9..e8a6639 100644 --- a/gcc/testsuite/gcc.dg/fdata-sections-1.c +++ b/gcc/testsuite/gcc.dg/fdata-sections-1.c @@ -1,7 +1,7 @@ /* PR middle-end/15486 */ /* Origin: Jonathan Larmour <[hidden email]> */ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-fdata-sections" } */ int x; diff --git a/gcc/testsuite/gcc.dg/fdata-sections-2.c b/gcc/testsuite/gcc.dg/fdata-sections-2.c index dda90ba7..48d44a2 100644 --- a/gcc/testsuite/gcc.dg/fdata-sections-2.c +++ b/gcc/testsuite/gcc.dg/fdata-sections-2.c @@ -4,7 +4,7 @@ /* This checks that string constants are put in per-function rodata sections, so that they can be garbage collected. */ -/* { dg-do compile { target *-*-linux* } } */ +/* { dg-do compile { target *-*-linux* *-*-uclinux* } } */ /* { dg-options "-O -ffunction-sections -fdata-sections" } */ const char *f1(void) { return "falderalde"; } diff --git a/gcc/testsuite/gcc.dg/pr39323-1.c b/gcc/testsuite/gcc.dg/pr39323-1.c index 7a7fd63..d84009c 100644 --- a/gcc/testsuite/gcc.dg/pr39323-1.c +++ b/gcc/testsuite/gcc.dg/pr39323-1.c @@ -1,5 +1,5 @@ /* PR c/39323 - MAX_OFILE_ALIGNMENT in elfos.h is too big */ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ int foo __attribute__ ((aligned(1 << 29))) = 20; /* { dg-error "requested alignment" } */ typedef int __attribute__ ((aligned(1 << 29))) int29; /* { dg-error "requested alignment" } */ diff --git a/gcc/testsuite/gcc.dg/pr39323-2.c b/gcc/testsuite/gcc.dg/pr39323-2.c index a870729..6b6cb2e 100644 --- a/gcc/testsuite/gcc.dg/pr39323-2.c +++ b/gcc/testsuite/gcc.dg/pr39323-2.c @@ -1,5 +1,5 @@ /* PR c/39323 */ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ int bar __attribute__ ((aligned(1 << 28))) = 20; diff --git a/gcc/testsuite/gcc.dg/pr39323-3.c b/gcc/testsuite/gcc.dg/pr39323-3.c index b452d3c..2e2c1a2 100644 --- a/gcc/testsuite/gcc.dg/pr39323-3.c +++ b/gcc/testsuite/gcc.dg/pr39323-3.c @@ -1,5 +1,5 @@ /* PR c/39323 */ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ typedef int __attribute__ ((aligned(1 << 28))) int28; int28 foo = 20; diff --git a/gcc/testsuite/gcc.dg/pr65780-1.c b/gcc/testsuite/gcc.dg/pr65780-1.c index b586211..5e3226e 100644 --- a/gcc/testsuite/gcc.dg/pr65780-1.c +++ b/gcc/testsuite/gcc.dg/pr65780-1.c @@ -1,5 +1,5 @@ /* PR target/65780 */ -/* { dg-do link { target *-*-linux* *-*-gnu* } } */ +/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2" } */ int optopt; diff --git a/gcc/testsuite/gcc.dg/pr65780-2.c b/gcc/testsuite/gcc.dg/pr65780-2.c index bff3323..932cbe1 100644 --- a/gcc/testsuite/gcc.dg/pr65780-2.c +++ b/gcc/testsuite/gcc.dg/pr65780-2.c @@ -1,5 +1,5 @@ /* PR target/65780 */ -/* { dg-do link { target *-*-linux* *-*-gnu* } } */ +/* { dg-do link { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-require-effective-target pie } */ /* { dg-options "-O2 -fpie" } */ diff --git a/gcc/testsuite/gcc.dg/pr67338.c b/gcc/testsuite/gcc.dg/pr67338.c index 0fdc302..7bfbef2 100644 --- a/gcc/testsuite/gcc.dg/pr67338.c +++ b/gcc/testsuite/gcc.dg/pr67338.c @@ -1,4 +1,4 @@ /* PR c/67338 */ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ struct S { __attribute__((aligned (1 << 28))) double a; }; diff --git a/gcc/testsuite/gcc.dg/pr78185.c b/gcc/testsuite/gcc.dg/pr78185.c index 405f748..d7781b2 100644 --- a/gcc/testsuite/gcc.dg/pr78185.c +++ b/gcc/testsuite/gcc.dg/pr78185.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O" } */ #include <unistd.h> diff --git a/gcc/testsuite/gcc.dg/pr83100-1.c b/gcc/testsuite/gcc.dg/pr83100-1.c index 233c1f6..ccfb8c6 100644 --- a/gcc/testsuite/gcc.dg/pr83100-1.c +++ b/gcc/testsuite/gcc.dg/pr83100-1.c @@ -1,5 +1,5 @@ /* PR target/83100 */ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fcommon -fdata-sections" } */ const int a; diff --git a/gcc/testsuite/gcc.dg/pr83100-4.c b/gcc/testsuite/gcc.dg/pr83100-4.c index bb26735..2f83247 100644 --- a/gcc/testsuite/gcc.dg/pr83100-4.c +++ b/gcc/testsuite/gcc.dg/pr83100-4.c @@ -1,5 +1,5 @@ /* PR target/83100 */ -/* { dg-do compile { target *-*-linux* *-*-gnu* } } */ +/* { dg-do compile { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fno-common -fdata-sections" } */ const int a; diff --git a/gcc/testsuite/gcc.dg/strlenopt-12g.c b/gcc/testsuite/gcc.dg/strlenopt-12g.c index f1dec1f..fb0eeb2 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-12g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-12g.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy function. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-14g.c b/gcc/testsuite/gcc.dg/strlenopt-14g.c index 1368ed3..81ddcc2 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-14g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-14g.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy and mempcpy functions. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ /* Bionic targets don't have mempcpy */ /* { dg-require-effective-target non_bionic } */ diff --git a/gcc/testsuite/gcc.dg/strlenopt-14gf.c b/gcc/testsuite/gcc.dg/strlenopt-14gf.c index f7db2a8..54cff83 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-14gf.c +++ b/gcc/testsuite/gcc.dg/strlenopt-14gf.c @@ -1,6 +1,6 @@ /* This test needs runtime that provides stpcpy, mempcpy and __*_chk functions. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ /* Bionic targets don't have mempcpy */ /* { dg-require-effective-target non_bionic } */ diff --git a/gcc/testsuite/gcc.dg/strlenopt-16g.c b/gcc/testsuite/gcc.dg/strlenopt-16g.c index 816cbbc..e847a7a 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-16g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-16g.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy function. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-17g.c b/gcc/testsuite/gcc.dg/strlenopt-17g.c index aa86f78..9e6373c 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-17g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-17g.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy function. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-18g.c b/gcc/testsuite/gcc.dg/strlenopt-18g.c index de692e0..0c219b8 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-18g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-18g.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy function. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-1f.c b/gcc/testsuite/gcc.dg/strlenopt-1f.c index 4e3abd9..e7d817f 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-1f.c +++ b/gcc/testsuite/gcc.dg/strlenopt-1f.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides __*_chk functions. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinu* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define FORTIFY_SOURCE 2 diff --git a/gcc/testsuite/gcc.dg/strlenopt-22g.c b/gcc/testsuite/gcc.dg/strlenopt-22g.c index 1ecb85e..6ee6bef 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-22g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-22g.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy function. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-2f.c b/gcc/testsuite/gcc.dg/strlenopt-2f.c index 5786f8a..c0c7f38 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-2f.c +++ b/gcc/testsuite/gcc.dg/strlenopt-2f.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides __*_chk functions. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define FORTIFY_SOURCE 2 diff --git a/gcc/testsuite/gcc.dg/strlenopt-31g.c b/gcc/testsuite/gcc.dg/strlenopt-31g.c index 4eff864..eee4b57 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-31g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-31g.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-33g.c b/gcc/testsuite/gcc.dg/strlenopt-33g.c index a814160..1950008 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-33g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-33g.c @@ -1,4 +1,4 @@ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-4g.c b/gcc/testsuite/gcc.dg/strlenopt-4g.c index 88dcec6..bf8aebb 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-4g.c +++ b/gcc/testsuite/gcc.dg/strlenopt-4g.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy function. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strlenopt-4gf.c b/gcc/testsuite/gcc.dg/strlenopt-4gf.c index 033661a..16eb5b0 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-4gf.c +++ b/gcc/testsuite/gcc.dg/strlenopt-4gf.c @@ -1,5 +1,5 @@ /* This test needs runtime that provides stpcpy and __*_chk functions. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2 -fdump-tree-strlen" } */ #define USE_GNU diff --git a/gcc/testsuite/gcc.dg/strncmp-2.c b/gcc/testsuite/gcc.dg/strncmp-2.c index f5555ba..6818b30 100644 --- a/gcc/testsuite/gcc.dg/strncmp-2.c +++ b/gcc/testsuite/gcc.dg/strncmp-2.c @@ -1,5 +1,5 @@ /* Test strncmp builtin expansion for compilation and proper execution. */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-options "-O2" } */ /* { dg-require-effective-target ptr32plus } */ diff --git a/gcc/testsuite/gcc.dg/struct-ret-3.c b/gcc/testsuite/gcc.dg/struct-ret-3.c index 4083bb4..4c0a0e6 100644 --- a/gcc/testsuite/gcc.dg/struct-ret-3.c +++ b/gcc/testsuite/gcc.dg/struct-ret-3.c @@ -1,7 +1,7 @@ /* PR middle-end/31309 */ /* Origin: Peeter Joot <[hidden email]> */ -/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-do run { target *-*-linux* *-*-gnu* *-*-uclinux* } } */ /* { dg-add-options stack_size } */ #include <sys/mman.h> diff --git a/gcc/testsuite/gcc.dg/torture/pr69760.c b/gcc/testsuite/gcc.dg/torture/pr69760.c index 8f24608..53733c7 100644 --- a/gcc/testsuite/gcc.dg/torture/pr69760.c +++ b/gcc/testsuite/gcc.dg/torture/pr69760.c @@ -1,5 +1,5 @@ /* PR tree-optimization/69760 */ -/* { dg-do run { target { { *-*-linux* *-*-gnu* } && mmap } } } */ +/* { dg-do run { target { { *-*-linux* *-*-gnu* *-*-uclinux* } && mmap } } } */ /* { dg-options "-O2" } */ #include <unistd.h> diff --git a/gcc/testsuite/gcc.target/arm/div64-unwinding.c b/gcc/testsuite/gcc.target/arm/div64-unwinding.c index 7f112ee..0944281 100644 --- a/gcc/testsuite/gcc.target/arm/div64-unwinding.c +++ b/gcc/testsuite/gcc.target/arm/div64-unwinding.c @@ -1,6 +1,6 @@ /* Performing a 64-bit division should not pull in the unwinder. */ -/* { dg-do run { target { ! *-*-linux* } } } */ +/* { dg-do run { target { { ! *-*-linux* } && { ! *-*-uclinux* } } } } */ /* { dg-options "-O0" } */ #include <stdlib.h> diff --git a/gcc/testsuite/gcc.target/arm/pr66912.c b/gcc/testsuite/gcc.target/arm/pr66912.c index 27e4c45..7e6294c 100644 --- a/gcc/testsuite/gcc.target/arm/pr66912.c +++ b/gcc/testsuite/gcc.target/arm/pr66912.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target *-*-linux* } } */ +/* { dg-do compile { target *-*-linux* arm*-*-uclinuxfdpiceabi } } */ /* { dg-options "-O2 -fpic" } */ __attribute__((visibility("protected"))) diff --git a/gcc/testsuite/gcc.target/arm/stack-checking.c b/gcc/testsuite/gcc.target/arm/stack-checking.c index 4b53bed..9d1d2b0 100644 --- a/gcc/testsuite/gcc.target/arm/stack-checking.c +++ b/gcc/testsuite/gcc.target/arm/stack-checking.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { *-*-linux* } } } */ +/* { dg-do run { target { *-*-linux* *-*-uclinux* } } } */ /* { dg-require-stack-check "" } */ /* { dg-options "-fstack-check" } */ diff --git a/gcc/testsuite/gcc.target/arm/synchronize.c b/gcc/testsuite/gcc.target/arm/synchronize.c index 7ef10e2..912f407 100644 --- a/gcc/testsuite/gcc.target/arm/synchronize.c +++ b/gcc/testsuite/gcc.target/arm/synchronize.c @@ -1,4 +1,4 @@ -/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target arm*-*-linux-* } } } */ +/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target arm*-*-linux-* arm*-*-uclinux* } } } */ void *foo (void) { diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index e32d424..0b67e10 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1202,6 +1202,7 @@ proc check_effective_target_pie { } { || [istarget *-*-dragonfly*] || [istarget *-*-freebsd*] || [istarget *-*-linux*] + || [istarget arm*-*-uclinuxfdpiceabi] || [istarget *-*-gnu*] || [istarget *-*-amdhsa]} { return 1; @@ -6853,6 +6854,7 @@ proc check_effective_target_sync_long_long_runtime { } { } "" }]) || [istarget aarch64*-*-*] + || [istarget arm*-*-uclinuxfdpiceabi] || ([istarget arm*-*-linux-*] && [check_runtime sync_longlong_runtime { #include <stdlib.h> @@ -6912,6 +6914,7 @@ proc check_effective_target_sync_int_long { } { || [istarget aarch64*-*-*] || [istarget alpha*-*-*] || [istarget arm*-*-linux-*] + || [istarget arm*-*-uclinuxfdpiceabi] || ([istarget arm*-*-*] && [check_effective_target_arm_acq_rel]) || [istarget bfin*-*linux*] @@ -6935,6 +6938,7 @@ proc check_effective_target_sync_char_short { } { || [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget alpha*-*-*] || [istarget arm*-*-linux-*] + || [istarget arm*-*-uclinuxfdpiceabi] || ([istarget arm*-*-*] && [check_effective_target_arm_acq_rel]) || [istarget hppa*-*linux*] -- 2.6.3 |
[ARM/FDPIC v6 18/24] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
Some tests have the "nonpic" guard, but pass on arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather than adding this target to all these tests, add the "pie_enabled" effective target. 2019-XX-XX Christophe Lyon <[hidden email]> gcc/testsuite/ * g++.dg/cpp0x/noexcept03.C: Add pie_enabled. * g++.dg/ipa/devirt-c-7.C: Likewise. * g++.dg/ipa/ivinline-1.C: Likewise. * g++.dg/ipa/ivinline-2.C: Likewise. * g++.dg/ipa/ivinline-3.C: Likewise. * g++.dg/ipa/ivinline-4.C: Likewise. * g++.dg/ipa/ivinline-5.C: Likewise. * g++.dg/ipa/ivinline-7.C: Likewise. * g++.dg/ipa/ivinline-8.C: Likewise. * g++.dg/ipa/ivinline-9.C: Likewise. * g++.dg/tls/pr79288.C: Likewise. * gcc.dg/addr_equal-1.c: Likewise. * gcc.dg/const-1.c: Likewise. * gcc.dg/ipa/pure-const-1.c: Likewise. * gcc.dg/noreturn-8.c: Likewise. * gcc.dg/pr33826.c: Likewise. * gcc.dg/torture/ipa-pta-1.c: Likewise. * gcc.dg/tree-ssa/alias-2.c: Likewise. * gcc.dg/tree-ssa/ipa-split-5.c: Likewise. * gcc.dg/tree-ssa/loadpre6.c: Likewise. * gcc.dg/uninit-19.c: Likewise. Change-Id: I1a0d836b892c23891f739fccdc467d0f354ab82c diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C index 2d37867..906a44d 100644 --- a/gcc/testsuite/g++.dg/cpp0x/noexcept03.C +++ b/gcc/testsuite/g++.dg/cpp0x/noexcept03.C @@ -1,6 +1,6 @@ // Runtime test for noexcept-specification. // { dg-options "-Wnoexcept" } -// { dg-do run { target nonpic } } +// { dg-do run { target { nonpic || pie_enabled } } } // { dg-require-effective-target c++11 } #include <exception> diff --git a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C index 2e76cbe..efb65c2 100644 --- a/gcc/testsuite/g++.dg/ipa/devirt-c-7.C +++ b/gcc/testsuite/g++.dg/ipa/devirt-c-7.C @@ -1,7 +1,6 @@ /* Verify that ipa-cp will not get confused by placement new constructing an object within another one when looking for dynamic type change . */ -/* { dg-do run } */ -/* { dg-require-effective-target nonpic } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -Wno-attributes" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-1.C b/gcc/testsuite/g++.dg/ipa/ivinline-1.C index 9b10d20..2d988bc 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-1.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-1.C @@ -1,6 +1,6 @@ /* Verify that simple virtual calls are inlined even without early inlining. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-2.C b/gcc/testsuite/g++.dg/ipa/ivinline-2.C index 21cd46f..d978638 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-2.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-2.C @@ -1,6 +1,6 @@ /* Verify that simple virtual calls using this pointer are inlined even without early inlining.. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-3.C b/gcc/testsuite/g++.dg/ipa/ivinline-3.C index 1e24644..f756a16 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-3.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-3.C @@ -1,6 +1,6 @@ /* Verify that simple virtual calls on an object refrence are inlined even without early inlining. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-4.C b/gcc/testsuite/g++.dg/ipa/ivinline-4.C index cf0d980..5fbd3ef 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-4.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-4.C @@ -1,7 +1,7 @@ /* Verify that simple virtual calls are inlined even without early inlining, even when a typecast to an ancestor is involved along the way. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-5.C b/gcc/testsuite/g++.dg/ipa/ivinline-5.C index f15ebf2..6c19907 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-5.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-5.C @@ -1,6 +1,6 @@ /* Verify that virtual call inlining does not pick a wrong method when there is a user defined ancestor in an object. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-7.C b/gcc/testsuite/g++.dg/ipa/ivinline-7.C index a7b41e7..fd6aba6 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-7.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-7.C @@ -1,7 +1,7 @@ /* Verify that simple virtual calls are inlined even without early inlining, even when a typecast to an ancestor is involved along the way and that ancestor is not the first one with virtual functions. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-8.C b/gcc/testsuite/g++.dg/ipa/ivinline-8.C index 5c3299f..bc81abf 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-8.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-8.C @@ -1,6 +1,6 @@ /* Verify that virtual calls are inlined (ithout early inlining) even when their caller is itself indirectly inlined. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/ipa/ivinline-9.C b/gcc/testsuite/g++.dg/ipa/ivinline-9.C index 41b2381..0917f15 100644 --- a/gcc/testsuite/g++.dg/ipa/ivinline-9.C +++ b/gcc/testsuite/g++.dg/ipa/ivinline-9.C @@ -2,7 +2,7 @@ inlining, even when a typecast to an ancestor is involved along the way and that ancestor itself has an ancestor wich is not the primary base class. */ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-ipa-inline -fno-early-inlining -fno-ipa-cp" } */ extern "C" void abort (void); diff --git a/gcc/testsuite/g++.dg/tls/pr79288.C b/gcc/testsuite/g++.dg/tls/pr79288.C index 9f488df..da6751f 100644 --- a/gcc/testsuite/g++.dg/tls/pr79288.C +++ b/gcc/testsuite/g++.dg/tls/pr79288.C @@ -1,5 +1,5 @@ // PR c++/79288 -// { dg-do compile { target nonpic } } +// { dg-do compile { target { nonpic || pie_enabled } } } // { dg-require-effective-target tls } // { dg-options "-O2" } // { dg-final { scan-assembler-not "@tpoff" { target i?86-*-* x86_64-*-* } } } diff --git a/gcc/testsuite/gcc.dg/addr_equal-1.c b/gcc/testsuite/gcc.dg/addr_equal-1.c index 18b0dc9..35fa010 100644 --- a/gcc/testsuite/gcc.dg/addr_equal-1.c +++ b/gcc/testsuite/gcc.dg/addr_equal-1.c @@ -1,5 +1,4 @@ -/* { dg-do run } */ -/* { dg-require-effective-target nonpic } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-require-weak "" } */ /* { dg-require-alias "" } */ /* { dg-options "-O2 -fdelete-null-pointer-checks" } */ diff --git a/gcc/testsuite/gcc.dg/const-1.c b/gcc/testsuite/gcc.dg/const-1.c index 2e95bd8..5c2d49d 100644 --- a/gcc/testsuite/gcc.dg/const-1.c +++ b/gcc/testsuite/gcc.dg/const-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target nonpic } } */ +/* { dg-do compile { target { nonpic || pie_enabled } } } */ /* { dg-options "-O2 -Wsuggest-attribute=const -fno-finite-loops" } */ extern int extern_const(int a) __attribute__ ((const)); diff --git a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c index 06b415e..dd58457 100644 --- a/gcc/testsuite/gcc.dg/ipa/pure-const-1.c +++ b/gcc/testsuite/gcc.dg/ipa/pure-const-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target nonpic } } */ +/* { dg-do compile { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-tree-local-pure-const1 -fdump-ipa-pure-const -fdump-tree-optimized -fno-early-inlining -fgnu89-inline" } */ void abort (void); int error_code; diff --git a/gcc/testsuite/gcc.dg/noreturn-8.c b/gcc/testsuite/gcc.dg/noreturn-8.c index 294800b..ce41cab 100644 --- a/gcc/testsuite/gcc.dg/noreturn-8.c +++ b/gcc/testsuite/gcc.dg/noreturn-8.c @@ -1,4 +1,4 @@ -/* { dg-do run { target nonpic } } */ +/* { dg-do run { target { nonpic || pie_enabled } } } */ /* { dg-options "-O2" } */ void exit (int); void noreturn_autodetection_failed (); diff --git a/gcc/testsuite/gcc.dg/pr33826.c b/gcc/testsuite/gcc.dg/pr33826.c index df83915..d222774 100644 --- a/gcc/testsuite/gcc.dg/pr33826.c +++ b/gcc/testsuite/gcc.dg/pr33826.c @@ -1,8 +1,7 @@ /* Regression test for PR middle-end/33826 */ /* Verify that recursive functions cannot be pure or const. */ -/* { dg-do compile } */ -/* { dg-require-effective-target nonpic } */ +/* { dg-do compile { target { nonpic || pie_enabled } } } */ /* { dg-options "-O1 -fdump-tree-local-pure-const1 -fdump-ipa-pure-const" } */ int recurse1 (int); diff --git a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c index 1bf4997..30156a3 100644 --- a/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c +++ b/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { nonpic } } } */ +/* { dg-do compile { target { nonpic || pie_enabled } } } */ /* { dg-options "-fipa-pta -fdump-ipa-pta2 -fno-ipa-icf" } */ /* { dg-skip-if "" { *-*-* } { "-O0" "-fno-fat-lto-objects" } { "" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c index e10a25d..f9d2dd4 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { nonpic } } } */ +/* { dg-do compile { target { nonpic || pie_enabled } } } */ /* { dg-options "-O2 -fdump-tree-optimized" } */ static int a; int f; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c index 2d713d6..3b5a94f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target nonpic } } */ +/* { dg-do compile { target { nonpic || pie_enabled } } } */ /* { dg-options "-O3 -fdump-tree-fnsplit -fdump-tree-optimized --param=builtin-expect-probability=100" } */ struct a {int a,b;}; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c index 028becd..b4e9296 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target nonpic } } */ +/* { dg-do compile { target { nonpic || pie_enabled } } } */ /* { dg-options "-O2 -fdump-tree-pre-stats -fdump-tree-fre1" } */ #include <stddef.h> -- 2.6.3 |
[ARM/FDPIC v6 19/24] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc.
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In reply to this post by Christophe Lyon
From: Christophe Lyon <[hidden email]>
uclibc defines bswap_32, so use a different name in this test. 2019-XX-XX Christophe Lyon <[hidden email]> gcc/testsuite/ * gcc.target/arm/pr43698.c (bswap_32): Rename as my_bswap_32. Change-Id: I2591bd911030814331cabf97ee5cf6cf8124b4f3 diff --git a/gcc/testsuite/gcc.target/arm/pr43698.c b/gcc/testsuite/gcc.target/arm/pr43698.c index 1fc497c..3b5dad0 100644 --- a/gcc/testsuite/gcc.target/arm/pr43698.c +++ b/gcc/testsuite/gcc.target/arm/pr43698.c @@ -6,7 +6,7 @@ char do_reverse_endian = 0; -# define bswap_32(x) \ +# define my_bswap_32(x) \ ((((x) & 0xff000000) >> 24) | \ (((x) & 0x00ff0000) >> 8) | \ (((x) & 0x0000ff00) << 8) | \ @@ -16,7 +16,7 @@ char do_reverse_endian = 0; (__extension__ ({ \ uint64_t __res; \ if (!do_reverse_endian) { __res = (X); \ - } else if (sizeof(X) == 4) { __res = bswap_32((X)); \ + } else if (sizeof(X) == 4) { __res = my_bswap_32((X)); \ } \ __res; \ })) -- 2.6.3 |
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